Kohei Yamamoto, Keisuke Fujii (May 20 2026).
Abstract: One of the major challenges in realizing fault-tolerant quantum computers (FTQCs) is the requirement for a large number of physical qubits. To address this issue, high-rate quantum error correcting codes, which efficiently embed logical qubits into physical qubits, have recently attracted considerable attention. Among such codes, quantum BCH codes, which offer both high rates and large code distances, are promising yet underexplored candidates. However, no fault-tolerant ancilla preparation method specialized for this class had been established. We employ a two-stage approach (non-fault-tolerant preparation + entanglement distillation) for ancilla preparation. We then propose a framework for designing low-overhead distillation method that strategically leverages the cyclic symmetry of quantum BCH codes to determine which non-fault-tolerant circuits can successfully produce a fault-tolerant state. Numerical simulations on several high-performance quantum BCH codes up to 127 qubits demonstrate that our method achieves lower spatial overhead and logical error rates than conventional distillation circuits. Furthermore, we evaluated the logical error rates under a circuit-level noise model, and obtained performance benchmarks in realistic settings. This efficient state preparation technique is expected to contribute to the early realization of practical FTQCs, particularly on highly connected quantum platforms such as neutral atom systems.
