aqora / Quantum Circuit Optimization

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Quantum Circuit Optimization (ZX-calculus)

Short Description

Benchmark circuits from Vivien Vandaele’s “Qubit-count optimization using ZX-calculus” and the Maslov reversible logic suite, provided as a single Parquet artifact. Each row stores the complete .qc circuit plus structured metadata so ZX-calculus qubit-reduction workflows can be reproduced entirely within Aqora.

Background

The paper combines two complementary techniques. First, Hadamard degadgetization removes auxiliary gadget wires, yielding ancilla-free circuits that reflect the true logical qubit count. Second, a ZX pathwidth–guided reduction merges overlapping spiders to eliminate qubits while preserving functional correctness and T-count. These steps are applied to circuits that have already passed through the FastTMerge → InternalHOpt → gadgetization → FastTODD chain, ensuring that T-depth and T-count remain optimized while qubit count is minimized.

Provenance

All circuits originate from the benchmarking suite used in Vandaele’s study, incorporating reversible logic benchmarks sourced from Dmitri Maslov. Reversible Logic Synthesis Benchmarks page — http://webhome.cs.uvic.ca/~dmaslov. Each circuit in the Parquet file is the serialized .qc output produced after the pre-optimization pipeline (FastTMerge → InternalHOpt → gadgetization → FastTODD) but before Hadamard degadgetization and ZX pathwidth reduction, providing a faithful snapshot of the inputs to the ZX-calculus qubit-count optimization procedure.

Contents

  • Rows: 40 circuits spanning adders (adder_*, qcla_*), GF(2^k) multipliers (gf2^k_mult), Barenco-style Toffoli networks (barenco_tof_*), Shor components (shor_*), modular adders/reducers (mod*_, rc_adder_*), and related reversible primitives.
  • Serialized circuit: each row carries the full .qc text plus lists of qubits, inputs, and outputs alongside aggregate counts and gate-type summaries.

Schema

ColumnTypeDescription
circuit_nameStringOriginal .qc filename.
circuitStringFull .qc description (.v/.i/.o headers + gate body such as H a, tof a b c).
variablesList[String]Qubit identifiers declared in .v.
inputsList[String]Primary input qubits from .i.
outputsList[String]Primary output qubits from .o (nullable if omitted).
num_variablesIntegerCount of qubits declared.
num_inputsIntegerCount of primary input qubits.
num_outputsIntegerCount of primary output qubits.
num_operationsIntegerNumber of gate/instruction lines between BEGIN and END.
gate_typesList[String]Unique gate mnemonics (lowercase; multi-qubit gates list controls first, target last).

Loading Examples

Polars

import polars as pl
from aqora_cli.pyarrow import dataset

df = pl.scan_pyarrow_dataset(
    dataset("aqora/quantum-circuit-optimization", "v0.0.0")
).collect()
print(df.head())

Pandas

import pandas as pd

df = pd.read_parquet(
    "aqora://aqora/quantum-circuit-optimization/v0.0.0"
)
print(df.head())

Suggested Analyses

  • Compare qubit-count reductions across stages (pre-gadget, degadgetized, ZX pathwidth optimized) to quantify the gains reported in the paper.
  • Stratify results by circuit family (e.g., adders vs. GF multipliers vs. Shor circuits) to examine how structural properties influence ZX-based savings.
  • Reproduce ZX pathwidth trends or explore alternative heuristics using the parsed metadata (gate types, operation counts, qubit sets).

Citation

If you use this dataset, please cite:
  • Vivien Vandaele, “Qubit-count optimization using ZX-calculus”, arXiv:2407.10171.
  • Dmitri Maslov, Reversible Logic Synthesis Benchmarks — http://webhome.cs.uvic.ca/~dmaslov