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Building a Fault-Tolerant Quantum Computer with High-Rate Quantum Codes

Juan Pablo Bonilla Ataides

Published Jan 1, 2026• 0 citations
OpenAlex

Abstract

Quantum error correction offers a path from fragile physical qubits to reliable quantum computation, but the resource cost of conventional architectures remains a central obstacle to useful machines. This thesis develops a full-stack approach based on high-rate quantum low-density parity-check (qLDPC) codes, which encode many logical qubits per block and can substantially reduce fault-tolerance overhead. Its central premise is that favorable code parameters are useful only when memory, hardware, logical operations, decoding, and interconnects are designed together. Quantum memories based on hypergraph-product, lifted-product, spatially coupled, and balanced-product codes provide the underlying algebraic structure, while reconfigurable neutral-atom arrays realize their nonlocal connectivity through parallel optical control, high-fidelity Rydberg gates, and loss-resolving readout. Universal logical computation is enabled through teleportation, homomorphic gates, and finite-block-length tricycle constructions for low-cost non-Clifford resource states. Structure-aware neural decoders learn spatial, temporal, and gate-induced correlations while remaining compatible with real-time feed-forward, and high-rate entanglement-distillation protocols extend the same constant-overhead principles to quantum interconnects. Together, these results outline an integrated route toward practical fault-tolerant quantum computers built from high-rate quantum codes.

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Quantum low-density parity-check (qLDPC) codes are promising candidates for realizing large-scale fault-tolerant quantum computing. Although many codes with favorable theoretical parameters have been developed, their practical adoption must take hardware implementability into account. For mainstream quantum platforms such as superconductors and neutral atoms, the connectivity, the length of non-local couplings, and the complexity of wiring or atom rearrangement are key factors that dictate the difficulty of hardware realization. Here, we propose a new family of qLDPC codes, termed routing codes. Within this family, we find explicit instances whose encoding rates are competitive to those of bivariate bicycle (BB) codes, while systematically reducing qubit connectivity, shortening the length of non-local couplings, and, crucially, making all non-local couplings mutually parallel. This parallelism translates into quantifiable benefits, substantially reducing wiring crossings in superconducting multi-layer architectures and simplifying the scheduling of atom movement in neutral-atom arrays. The weight-7 routing codes maintain a high threshold of 0.7\% and reduce the physical qubit overhead by approximately a factor of 8, compared to surface codes achieving a same logical error rate. Further increasing the weight to 11 yields a [[200, 24, 14]] and [[200, 16, 17]] codes with an encoding rate over 23 times that of the surface code, at the cost of a higher logical error rate. These results establish routing codes as a hardware-centric qLDPC family that bridges the gap between theoretical optimality and near-term physical feasibility.

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Quantum error correction offers a path from fragile physical qubits to reliable quantum computation, but the resource cost of conventional architectures remains a central obstacle to useful machines. This thesis develops a full-stack approach based on high-rate quantum low-density parity-check (qLDPC) codes, which encode many logical qubits per block and can substantially reduce fault-tolerance overhead. Its central premise is that favorable code parameters are useful only when memory, hardware, logical operations, decoding, and interconnects are designed together. Quantum memories based on hypergraph-product, lifted-product, spatially coupled, and balanced-product codes provide the underlying algebraic structure, while reconfigurable neutral-atom arrays realize their nonlocal connectivity through parallel optical control, high-fidelity Rydberg gates, and loss-resolving readout. Universal logical computation is enabled through teleportation, homomorphic gates, and finite-block-length tricycle constructions for low-cost non-Clifford resource states. Structure-aware neural decoders learn spatial, temporal, and gate-induced correlations while remaining compatible with real-time feed-forward, and high-rate entanglement-distillation protocols extend the same constant-overhead principles to quantum interconnects. Together, these results outline an integrated route toward practical fault-tolerant quantum computers built from high-rate quantum codes.
Quantum low-density parity-check (qLDPC) codes can achieve high encoding rates and good code distance scaling, providing a promising route to low-overhead fault-tolerant quantum computing. However, the long-range connectivity required to implement such codes makes their physical realization challenging. Here, we propose a hardware-efficient scheme to perform fault-tolerant quantum computation with high-rate qLDPC codes on reconfigurable atom arrays, directly compatible with recently demonstrated experimental capabilities. Our approach utilizes the product structure inherent in many qLDPC codes to implement the non-local syndrome extraction circuit via atom rearrangement, resulting in effectively constant overhead in practically relevant regimes. We prove the fault tolerance of these protocols, perform circuit-level simulations of memory and logical operations with these codes, and find that our qLDPC-based architecture starts to outperform the surface code with as few as several hundred physical qubits at a realistic physical error rate of 10−310^{-3}10−3. We further find that less than 3000 physical qubits are sufficient to obtain over an order of magnitude qubit savings compared to the surface code, and quantum algorithms involving thousands of logical qubits can be performed using less than 10510^5105 physical qubits. Our work paves the way for explorations of low-overhead quantum computing with qLDPC codes at a practical scale, based on current experimental technologies.
Quantum low-density parity-check (qLDPC) codes can substantially reduce the qubit overhead of fault-tolerant quantum computation, but any useful architecture based on such codes also requires an efficient mechanism to implement non-Clifford gates in a fault-tolerant manner. We introduce a space-time-efficient magic state factory for high-rate qLDPC codes by combining the transversal non-Clifford gates of recently developed tricycle codes with single-shot four-dimensional balanced product quadcycle codes. The key ingredient is an efficient "escape" mechanism that teleports postselected logical magic states from tricycle codes to larger distance quadcycle codes. Under a standard circuit-level noise model at physical error rate 10−310^{-3}10−3, our factories produce CCZ\mathrm{CCZ}CCZ states at logical error rates as low as 10−910^{-9}10−9 with 10-40 times lower space-time cost than state-of-the-art magic state generation methods. The resulting states are directly encoded in high-rate blocks suitable for computation. We identify the quadcycle codes by an AI-assisted search and show that they can serve as excellent memories capable of single-shot error correction. Finally, we present a concrete implementation of the entire factory with highly efficient atom transport on reconfigurable neutral-atom quantum computers. Together, these results provide an end-to-end, practical protocol for producing and utilizing high-fidelity magic states within a high-rate qLDPC architecture, with the lowest space-time cost to date.
Quantum low-density parity-check (qLDPC) codes offer a promising route to reducing the qubit overhead of fault tolerance, with recent ultra-high-rate constructions achieving encoding rates above one half. In this work, we develop fast and parallel logical computation methods for ultra-high-rate codes. We first utilize the group symmetries of the codes to partition the logical qubits into orbits, and then apply parallel surgery methods to implement group-invariant collections of logical Pauli-product measurements. These measurements are highly programmable, as we may arbitrarily couple logical orbits as long as each measurement is repeated across the whole orbit(s). To reduce the space and time overheads, we develop a technique called chain-map convolution, which uses the group structure to boost both the spatial and temporal distances of our protocol in a highly efficient manner. As case studies, we construct distance-preserving parallel measurement gadgets for the [[256, 68, 12]], [[576, 148, 18]] pair-partition codes, and a [[1152, 580, 12]] rate-1/21/21/2 code, with only around 2.5×2.5\times2.5× space overhead and 3-4 rounds of syndrome extraction each. The same methods also enable parallel injection of cultivated magic states into high-rate codes. Finally, we extend programmability through subgroup restrictions, revealing a tradeoff between logical control and the spacetime resources required for fault tolerance and highlighting the crucial role structured parallelism plays in reducing overhead. These results provide new methods for designing qLDPC logical operations with low spacetime overhead, opening a route toward more efficient fault-tolerant quantum architectures.
High-rate quantum LDPC (qLDPC) codes reduce memory overhead by densely packing many logical qubits into a single block of physical qubits. Here we extend this concept to high-rate computation by constructing \emph{batched} fault-tolerant operations that apply the same logical gate across many code blocks in parallel. By leveraging shared physical resources to execute many logical operations in parallel, these operations realize high rates in space-time and significantly reduce computational costs. For \emph{arbitrary} CSS qLDPC codes, we build batched gadgets with \emph{constant space-time overhead} (assuming fast classical computation) for (i) single-shot error correction, state preparation, and code surgeries (ii) code switching, and (iii) addressable Clifford gates. Using these batched gadgets we also construct parallel non-Clifford gates with low space-time cost. We outline principles for designing parallel quantum algorithms optimized for a batched architecture, and show in particular how lattice Hamiltonian dynamical simulations can be compiled efficiently. We also propose a near-term implementation using new self-dual Bivariate-Bicycle codes with high encoding rates (∼1/10\sim 1/10∼1/10), transversal Clifford gates, and global TTT gates via parallel magic state cultivation, enabling Hamiltonian simulations with a lower space-time cost than analogous surface-code protocols and low-rate qLDPC protocols. These results open new paths toward scalable quantum computation via co-design of parallel quantum algorithms and high-rate fault-tolerant protocols.
Quantum low-density parity-check (qLDPC) codes are promising candidates for realizing large-scale fault-tolerant quantum computing. Although many codes with favorable theoretical parameters have been developed, their practical adoption must take hardware implementability into account. For mainstream quantum platforms such as superconductors and neutral atoms, the connectivity, the length of non-local couplings, and the complexity of wiring or atom rearrangement are key factors that dictate the difficulty of hardware realization. Here, we propose a new family of qLDPC codes, termed routing codes. Within this family, we find explicit instances whose encoding rates are competitive to those of bivariate bicycle (BB) codes, while systematically reducing qubit connectivity, shortening the length of non-local couplings, and, crucially, making all non-local couplings mutually parallel. This parallelism translates into quantifiable benefits, substantially reducing wiring crossings in superconducting multi-layer architectures and simplifying the scheduling of atom movement in neutral-atom arrays. The weight-7 routing codes maintain a high threshold of 0.7\% and reduce the physical qubit overhead by approximately a factor of 8, compared to surface codes achieving a same logical error rate. Further increasing the weight to 11 yields a [[200, 24, 14]] and [[200, 16, 17]] codes with an encoding rate over 23 times that of the surface code, at the cost of a higher logical error rate. These results establish routing codes as a hardware-centric qLDPC family that bridges the gap between theoretical optimality and near-term physical feasibility.
High-rate quantum low-density parity-check (qLDPC) codes encode many logical qubits with low physical-qubit overhead, but realizing efficient fault-tolerant computation on such dense encodings remains a major challenge. Generic, code-agnostic techniques such as code surgery and gate teleportation apply broadly, but are difficult to make modular, low-overhead, and fully certifiable on complex high-rate codes whose structure is left unexploited. Here we overcome these obstacles by co-designing the code together with its logical instruction set for a broad family of canonical lifted-product (LP) codes with cyclic symmetry. We show that these codes admit a canonical logical basis, in which conjugate logical operators are organized into rows and columns of cyclic orbits inherited directly from the underlying classical codes, analogous to the structure that makes hypergraph-product codes so tractable. This canonical basis enables universal logical processing using magic-state input and a constant number of reusable seed surgery gadgets---only two (resp. four) for a [[1122,148,≤20]][[1122,148,\leq 20]][[1122,148,≤20]] (resp. [[4350,1224,≤20]][[4350,1224,\leq 20]][[4350,1224,≤20]]) LP code. A fixed extractor smaller than half the data block also enables arbitrarily high-weight logical Pauli-product measurements (PPMs) while preserving the code's cyclic symmetry. These codes also enable rigorously fault-tolerant parallel logic, including PPMs across all logical qubits and magic-state injection from many surface codes into a full LP block. For example, a [[468,36,20]][[468,36,20]][[468,36,20]] (resp. [[952,112,17]][[952,112,17]][[952,112,17]]) code supports simultaneous measurements of arbitrary logically disjoint Pauli products with an ancilla overhead of roughly three (resp. four) times the data block size. These results advance the frontier of fault-tolerant quantum computation on ultra-high-rate quantum architectures.