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A matching threshold of 1.6×10⁻³ for the rotated surface code under circuit-level noise

Tejasvi Singh Tomar

Published Oct 19, 2026• 0 citations
Publisher

Abstract

We consider the rotated surface code of odd distance d with its standard syndrome-extraction circuit, under circuit-level depolarizing noise in which every gate, idle step, preparation and measurement fails independently with probability p, decoded by minimum-weight perfect matching with the log-likelihood weights of single faults. We prove that a memory experiment with T rounds fails with probability at most 0.061 (T+1)(d+1) λd/(1−λ), where λ = 0.999 (p/p**)9/25, for every p ≤ p** = 2×10−3. Hence the logical error rate per round decays exponentially in d for all p ≤ p**. Earlier rigorous thresholds for matching on surface-code circuits are 1.7×10−4, due to Dennis, Kitaev, Landahl and Preskill, and 7.4×10−4, due to Fowler. We keep their reduction of a failure to a weighted self-avoiding path in the decoding graph, but bound these paths by a local criterion for non-backtracking walks, which gives the threshold 1.04×10−3 in closed form. To reach 2×10−3 we use the minimality of the correction along the path, for a canonical choice among the minimum-weight corrections: labellings of short stretches of the path into error and correction edges that contradict this minimality are excluded, and the remaining labelled walks are counted with a potential function that is checked in exact arithmetic. For a leaner schedule with fused measure-and-reset steps the two arguments give 1.53×10−3 and 3×10−3, respectively. With error rates that depend on the type of operation, they certify exponential decay for error models built from the published component error rates of Quantinuum's Helios and H2 and of IBM's Heron r3 processor ibm_boston, mapped onto this circuit. All theorems are also proved in the proof assistant Lean 4. Any argument that bounds the failure probability by the probability of an increasing event, ours included, is limited by the smallest such event that contains all failures, and Monte Carlo estimates place the threshold of this event near 4×10−3 for this circuit. Changes from version 1: a third exclusion rule, which uses a canonical choice among the minimum-weight corrections, raises the certified thresholds to 2×10−3 for the standard schedule and 3×10−3 for the lean one and strengthens the certificates of the device error models. Lean 4 proofs of all theorems are new in this version. Programs, certificates, formal proofs and the outputs of all checks: doi:10.5281/zenodo.23485205. Mathematics Subject Classification (2020): 81P73; 94B35, 05C38, 68V05.

DOI
10.5281/zenodo.23472225

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We consider the rotated surface code of odd distance d with its standard syndrome-extraction circuit, under circuit-level depolarizing noise in which every gate, idle step, preparation and measurement fails independently with probability p, decoded by minimum-weight perfect matching with the log-likelihood weights of single faults. We prove that a memory experiment with T rounds fails with probability at most 0.061 (T+1)(d+1) λd/(1−λ), where λ = 0.999 (p/p**)9/25, for every p ≤ p** = 2×10−3. Hence the logical error rate per round decays exponentially in d for all p ≤ p**. Earlier rigorous thresholds for matching on surface-code circuits are 1.7×10−4, due to Dennis, Kitaev, Landahl and Preskill, and 7.4×10−4, due to Fowler. We keep their reduction of a failure to a weighted self-avoiding path in the decoding graph, but bound these paths by a local criterion for non-backtracking walks, which gives the threshold 1.04×10−3 in closed form. To reach 2×10−3 we use the minimality of the correction along the path, for a canonical choice among the minimum-weight corrections: labellings of short stretches of the path into error and correction edges that contradict this minimality are excluded, and the remaining labelled walks are counted with a potential function that is checked in exact arithmetic. For a leaner schedule with fused measure-and-reset steps the two arguments give 1.53×10−3 and 3×10−3, respectively. With error rates that depend on the type of operation, they certify exponential decay for error models built from the published component error rates of Quantinuum's Helios and H2 and of IBM's Heron r3 processor ibm_boston, mapped onto this circuit. All theorems are also proved in the proof assistant Lean 4. Any argument that bounds the failure probability by the probability of an increasing event, ours included, is limited by the smallest such event that contains all failures, and Monte Carlo estimates place the threshold of this event near 4×10−3 for this circuit. Changes from version 1: a third exclusion rule, which uses a canonical choice among the minimum-weight corrections, raises the certified thresholds to 2×10−3 for the standard schedule and 3×10−3 for the lean one and strengthens the certificates of the device error models. Lean 4 proofs of all theorems are new in this version. Programs, certificates, formal proofs and the outputs of all checks: doi:10.5281/zenodo.23485205. Mathematics Subject Classification (2020): 81P73; 94B35, 05C38, 68V05.
Abstract We study decoder-representation sensitivity in simulated rotated surface-code Z-memory circuits with local spatially correlated XX pair events. At distance 3, ordinary minimum-weight perfect matching (MWPM) produced 4,610 versus 1,260 logical failures at p_corr = 10^-4 and 5,437 versus 2,239 at p_corr = 2 × 10^-4 on the same 500,000-shot samples using original-order versus canonical-sorted detector error models (DEMs). Across 50 additional seeded permutations per condition, failure counts varied widely. Canonical sorting tied for the minimum in this finite tested set; it is not claimed to be universally optimal. The ordering experiment reorders complete error instructions in a flattened DEM, preserving their probabilities and absolute detector and logical targets. PyMatching documents retaining the first-added logical-label set when parallel graph edges are merged; we therefore interpret the findings as a workflow-specific reproducibility result, not a newly discovered general software defect. At distances 5 and 7, correlation-aware MWPM had lower observed failure rates in all eight tested conditions, with six paired contrasts remaining significant after Bonferroni correction. An exact maximum-a-posteriori calculation gave a 0.2367% Bayes risk for the flattened-DEM distribution at p_corr = 10^-4; this is optimal for that modeled distribution only. This bounded classical simulation study proposes no new decoder, estimates no threshold, and provides no hardware evidence. Some historical source-to-result provenance remains incomplete, as disclosed in the manuscript. Code and evidence: https://github.com/tgiwn/QEC-surface-code-correlated-noise/tree/106d32e815c5f6009941afc36d3f65be7ecf35a3 Status: This is a preprint and has not undergone peer review.
Quantum error correction can suppress logical errors exponentially with code distance when physical noise is below threshold. Realizing this on hardware requires tight coordination among quantum gates, mid-circuit measurements, and qubit coherence. Device variation, noise asymmetry, and correlations across space and time complicate the translation of these capabilities into logical error suppression. Here, we study rotated surface-code memory on an IBM Nighthawk r2 processor. Performance varies across tested processor placements, which we attribute to differences in qubit quality. We optimize the code by combining short readout, fused measurement and reset, and an XX echo on data qubits during ancilla readout. Compared with standard readout without reset or echo, the optimized syndrome extraction circuit reduces the median per-round logical error rate by factors of 3.8 in the X basis and 1.4 in the Z basis. In memory experiments of up to 150 rounds, the distance advantage weakens, alongside long-lived correlations that may reflect a persistent error component. Under our optimization recipe, increasing the protected distance from 3 to 6 while holding the other distance fixed reduces the per-round logical error rate from 0.53% to 0.24% in Z memory and from 0.52% to 0.22% in X memory. The corresponding error-suppression factors under maximum-likelihood decoding are 1.68 and 1.85. These results connect circuit compilation and optimization to surface-code memory performance and limitations, and motivate QPU and QEC circuit codesign for fault-tolerant quantum computing primitives on current cloud hardware.
Surface codes exploit topological protection to increase error resilience in quantum computing devices and can in principle be implemented in existing hardware. They are one of the most promising candidates for active error correction, not least due to a polynomial-time decoding algorithm which admits one of the highest predicted error thresholds. We consider the dependence of this threshold on underlying assumptions including different noise models, and analyze the performance of a minimum weight perfect matching (MWPM) decoding compared to a mathematically optimal maximum likelihood (ML) decoding. Our ML algorithm tracks the success probabilities for all possible corrections over time and accounts for individual gate failure probabilities and error propagation due to the syndrome measurement circuit. We present the very first evidence for the true error threshold of an optimal circuit level decoder, allowing us to draw conclusions about what kind of improvements are possible over standard MWPM.
Layer codes are three-dimensional local CSS codes of check weight at most six, obtained by quasi-concatenating a CSS input code with unrotated surface code patches. What is established about them describes the code, not the circuit that measures it. In this work, we evaluate them as active memories under circuit-level noise. Doing so first requires a syndrome extraction circuit, and the junction stabilizers that couple the patches rule out borrowing a surface code patch's CNOT schedule. We present a decoder-free scheduler that constrains hook propagation first and compresses depth afterwards, generate circuits for eighteen layer codes across four input codes, and compare them with surface codes of the same distance, simulated and decoded in the same way. The circuits lose no distance to hook errors on [[4,2,2]]-input codes wherever a circuit-distance proof is affordable, and reach a lower logical error rate than those of a general-purpose scheduler for CSS codes at roughly half its CNOT depth per round. Our primary family built from a [[4,2,2]] input code reaches a circuit-level threshold of 5.06(7)×10−35.06(7)\times10^{-3}5.06(7)×10−3. The layer code outperforms the surface code in terms of idle robustness: at the same distance it tolerates an interval between syndrome extraction rounds 1.7-3.0 times longer than the rotated surface code. This comes at the cost of 1.7-5.0 times more operations per unit time and approximately five times more physical qubits, both per logical qubit. Finally, we model the cost of the beyond-2D cross-plane CNOTs that the construction demands, and find that their speed matters far more than their fidelity.
Fault tolerance is a prerequisite for scalable quantum computing. Architectures based on 2D topological codes are effective for near-term implementations of fault tolerance. To obtain high performance with these architectures, we require a decoder which can adapt to the wide variety of error models present in experiments. The typical approach to the problem of decoding the surface code is to reduce it to minimum-weight perfect matching in a way that provides a suboptimal threshold error rate, and is specialized to correct a specific error model. Recently, optimal threshold error rates for a variety of error models have been obtained by methods which do not use minimum-weight perfect matching, showing that such thresholds can be achieved in polynomial time. It is an open question whether these results can also be achieved by minimum-weight perfect matching. In this work, we use belief propagation and a novel algorithm for producing edge weights to increase the utility of minimum-weight perfect matching for decoding surface codes. This allows us to correct depolarizing errors using the rotated surface code, obtaining a threshold of 17.76 ± 0.02 % . This is larger than the threshold achieved by previous matching-based decoders ( 14.88 ± 0.02 % ), though still below the known upper bound of ∼ 18.9 % .
Practical quantum computers will require resource-efficient error-correcting codes. The rotated surface code uses approximately half the number of qubits as the unrotated surface code to create a logical qubit with the same error-correcting distance. However, instead of distance, a more useful qubit-saving metric would be based on logical error rates. In this work we find the well-below-threshold scaling of logical to physical error rates under circuit-level noise for both codes at high odd and even distances and then compare the number of qubits used by each code to achieve equal logical error rates. We perform Monte Carlo sampling of memory experiment circuits with all valid CNOT orders using the stabilizer simulator Stim and the uncorrelated minimum-weight perfect matching decoder PyMatching 2. We find that the rotated code uses about 74 % the number of qubits used by the unrotated code to achieve a logical error rate of p L = 10 − 12 at the operational physical error rate of p = 10 − 3 . The ratio remains ≈ 75 % for p values within a factor of two of p = 10 − 3 for all useful p L . Our work finds the low- p L scaling of the surface code and clarifies the qubit savings provided by the rotated surface code, providing numerical justification for its use in future implementations of the surface code.