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The Late-2026 Quantum Audit: Is It a Computer Yet, and What Does a Megaquop Cost?

Kase Branham

Published Sep 29, 2026• 0 citations
Publisher

Abstract

This paper is the six-month follow-up to *The 2026 Quantum Audit* (April 2026), applying the Quantum Operations Model (QOM) cost framework to what changed in quantum computing between April and September 2026. The two events April named as the next audit's triggers — IBM's Kookaburra processor and the Magne neutral-atom machine — have not fired. Five other things did. Quantinuum ran a heterogeneous-code architecture (Helix) on hardware: a memory code, a compute code, and an interface between them on one machine, decoded offline. The industry adopted reliable logical operations as its unit — proposed as rQOPS and QLOPS in 2023–2025, named by Preskill's megaquop, specified by the US Department of Energy's "hard operations," and, in Sandia's QUOPS benchmark, measured for the first time on logical hardware. NVIDIA shipped a compiler that emits fault-tolerant resource estimates. DOE published a procurement specification for a quantum computer — Genesis Q, with up to $215 million in appropriation-dependent milestone pools for machines of at least 100 logical qubits performing an illustrative 10⁵ "hard" operations, evaluated in September 2028 — that is the same width and, over one run, the same total operation volume as the QOM reference computation, at a tighter error target. And Microsoft's topological program produced a second contested preprint. Two new instruments are introduced. A Von Neumann scorecard asks, for each of seven components a computer must have — memory, logic, control unit, I/O, bus, compiler, clock — whether any platform has demonstrated it below break-even, with dates. Every component has at least one public demonstration somewhere; on this report's criteria five of the seven rows have a Pass on some platform and two — the control unit, and sustained operation at the logical level — have none; no platform has more than three Passes. And a price per megaquop, from the identity C_megaquop = 10⁶ · w_sys / (U · Ω_L), where w_sys is the machine's rate in dollars per second, Ω_L its throughput in reliable logical operations per second, and U the fraction of machine time that produces the buyer's operations. On the only logical rate measured on commercially accessible hardware that we identified (Helios-1, 4.9 logical QUOPS per second, at a width of four and a completed circuit size of 40), a megaquop is a derived 57 hours — a lower bound, since the benchmark's accuracy threshold sits far above megaquop-grade reliability — and, against separately assembled cross-platform system-rate proxies, an estimated $141,000–408,000 at list prices for dedicated machine time or $61,000–184,000 at an operator's cost, with a second route from per-gate list prices giving $0.6–1.5 million; the modeled fault-tolerant machines of April's tables price it at three cents to about $550 and seconds to minutes. The distance between the two is two and a half to five orders of magnitude in price and three to four in time; the time gap is entirely the throughput term, and the system-rate term narrows the price gap rather than widening it. The April thesis holds: the QEC overhead is the dominant modeled cost, this audit identifies no independently replicated advantage over the best classical method on a workload with a classical solution in production use, and quantum computing's near-term value lies in capability rather than cost reduction. The verdict in one line: the parts exist, no platform yet satisfies the eight-row criterion for a computer, and the invoice can now be estimated per operation from a measured rate. Three errors in the April paper are corrected.

DOI
10.5281/zenodo.23046315

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This paper is the six-month follow-up to The 2026 Quantum Audit (April 2026), applying the Quantum Operations Model (QOM) cost framework to what changed in quantum computing between April and September 2026. The two events April named as the next audit's triggers — IBM's Kookaburra processor and the Magne neutral-atom machine — have not fired. Five other things did. Quantinuum ran a heterogeneous-code architecture (Helix) on hardware: a memory code, a compute code, and an interface between them on one machine, decoded offline. The industry adopted reliable logical operations as its unit — proposed as rQOPS and QLOPS in 2023–2025, named by Preskill's megaquop, specified by the US Department of Energy's "hard operations," and, in Sandia's QUOPS benchmark, measured for the first time on logical hardware. NVIDIA shipped a compiler that emits fault-tolerant resource estimates. DOE published a procurement specification for a quantum computer — Genesis Q, with up to 215millioninappropriation−dependentmilestonepoolsformachinesofatleast100logicalqubitsperforminganillustrative105"hard"operations,evaluatedinSeptember2028—thatisthesamewidthand,overonerun,thesametotaloperationvolumeastheQOMreferencecomputation,atatightererrortarget.AndMicrosoft′stopologicalprogramproducedasecondcontestedpreprint.Twonewinstrumentsareintroduced.AVonNeumannscorecardasks,foreachofsevencomponentsacomputermusthave—memory,logic,controlunit,I/O,bus,compiler,clock—whetheranyplatformhasdemonstrateditbelowbreak−even,withdates.Everycomponenthasatleastonepublicdemonstrationsomewhere;onthisreport′scriteriafiveofthesevenrowshaveaPassonsomeplatformandtwo—thecontrolunit,andsustainedoperationatthelogicallevel—havenone;noplatformhasmorethanthreePasses.Andapricepermegaquop,fromtheidentityCmegaquop=106⋅wsys/(U⋅ΩL),wherewsysisthemachine′srateindollarspersecond,ΩLitsthroughputinreliablelogicaloperationspersecond,andUthefractionofmachinetimethatproducesthebuyer′soperations.Ontheonlylogicalratemeasuredoncommerciallyaccessiblehardwarethatweidentified(Helios−1,4.9logicalQUOPSpersecond,atawidthoffourandacompletedcircuitsizeof40),amegaquopisaderived57hours—alowerbound,sincethebenchmark′saccuracythresholdsitsfarabovemegaquop−gradereliability—and,againstseparatelyassembledcross−platformsystem−rateproxies,anestimated215 million in appropriation-dependent milestone pools for machines of at least 100 logical qubits performing an illustrative 10⁵ "hard" operations, evaluated in September 2028 — that is the same width and, over one run, the same total operation volume as the QOM reference computation, at a tighter error target. And Microsoft's topological program produced a second contested preprint. Two new instruments are introduced. A Von Neumann scorecard asks, for each of seven components a computer must have — memory, logic, control unit, I/O, bus, compiler, clock — whether any platform has demonstrated it below break-even, with dates. Every component has at least one public demonstration somewhere; on this report's criteria five of the seven rows have a Pass on some platform and two — the control unit, and sustained operation at the logical level — have none; no platform has more than three Passes. And a price per megaquop, from the identity C_megaquop = 10⁶ · w_sys / (U · Ω_L), where w_sys is the machine's rate in dollars per second, Ω_L its throughput in reliable logical operations per second, and U the fraction of machine time that produces the buyer's operations. On the only logical rate measured on commercially accessible hardware that we identified (Helios-1, 4.9 logical QUOPS per second, at a width of four and a completed circuit size of 40), a megaquop is a derived 57 hours — a lower bound, since the benchmark's accuracy threshold sits far above megaquop-grade reliability — and, against separately assembled cross-platform system-rate proxies, an estimated 215millioninappropriation−dependentmilestonepoolsformachinesofatleast100logicalqubitsperforminganillustrative105"hard"operations,evaluatedinSeptember2028—thatisthesamewidthand,overonerun,thesametotaloperationvolumeastheQOMreferencecomputation,atatightererrortarget.AndMicrosoft′stopologicalprogramproducedasecondcontestedpreprint.Twonewinstrumentsareintroduced.AVonNeumannscorecardasks,foreachofsevencomponentsacomputermusthave—memory,logic,controlunit,I/O,bus,compiler,clock—whetheranyplatformhasdemonstrateditbelowbreak−even,withdates.Everycomponenthasatleastonepublicdemonstrationsomewhere;onthisreport′scriteriafiveofthesevenrowshaveaPassonsomeplatformandtwo—thecontrolunit,andsustainedoperationatthelogicallevel—havenone;noplatformhasmorethanthreePasses.Andapricepermegaquop,fromtheidentityCm​egaquop=106⋅ws​ys/(U⋅ΩL​),wherews​ysisthemachine′srateindollarspersecond,ΩL​itsthroughputinreliablelogicaloperationspersecond,andUthefractionofmachinetimethatproducesthebuyer′soperations.Ontheonlylogicalratemeasuredoncommerciallyaccessiblehardwarethatweidentified(Helios−1,4.9logicalQUOPSpersecond,atawidthoffourandacompletedcircuitsizeof40),amegaquopisaderived57hours—alowerbound,sincethebenchmark′saccuracythresholdsitsfarabovemegaquop−gradereliability—and,againstseparatelyassembledcross−platformsystem−rateproxies,anestimated141,000–408,000 at list prices for dedicated machine time or 61,000–184,000atanoperator′scost,withasecondroutefromper−gatelistpricesgiving61,000–184,000 at an operator's cost, with a second route from per-gate list prices giving 61,000–184,000atanoperator′scost,withasecondroutefromper−gatelistpricesgiving0.6–1.5 million; the modeled fault-tolerant machines of April's tables price it at three cents to about $550 and seconds to minutes. The distance between the two is two and a half to five orders of magnitude in price and three to four in time; the time gap is entirely the throughput term, and the system-rate term narrows the price gap rather than widening it. The April thesis holds: the QEC overhead is the dominant modeled cost, this audit identifies no independently replicated advantage over the best classical method on a workload with a classical solution in production use, and quantum computing's near-term value lies in capability rather than cost reduction. The verdict in one line: the parts exist, no platform yet satisfies the eight-row criterion for a computer, and the invoice can now be estimated per operation from a measured rate. Three errors in the April paper are corrected.
This paper applies the Quantum Operations Model (QOM)¹ cost framework to the five mostconsequential developments in quantum computing from late 2025 through early 2026: theGoogle/Oratomic cryptographic resource estimate compression, Microsoft's contestedtopological qubit claims, IBM's qLDPC-based Starling architecture roadmap, the first deliveriesof error-corrected "level-2" quantum machines (systems implementing real-time quantum errorcorrection on physical hardware), and emerging continuous-variable (CV) error correctiontechniques that bypass Gottesman-Kitaev-Preskill (GKP) state preparation. We ask: how dothese recent advances alter the cost structure of fault-tolerant quantum computation as modeledby QOM?The answer is nuanced. Algorithmic improvements — particularly in Shor's algorithmcompilation and quantum LDPC error correction codes — have compressed the gap betweencurrent hardware and useful fault-tolerant computation more than any single hardware advance,though these algorithmic results carry their own assumptions that require scrutiny. The QECoverhead,² identified in prior work as the dominant cost factor in quantum computation, is beingrenegotiated through new codes but has not yet been reduced in practice on any shippinghardware. Meanwhile, the topological qubit program suffered a significant credibility correctionwhen replication studies published in Science found simpler explanations for previouslycelebrated experimental signatures. Updated QOM cost tables are provided for all four majorarchitectures under both legacy surface-code and projected qLDPC overhead assumptions, withsensitivity ranges across physical error rates from 10⁻³ to 10⁻⁴. The central thesis of the QuantumAudit series — that quantum computing's near-term value lies in capability rather than costreduction — remains intact, but the timeline to that capability shortened meaningfully this year.¹ The Quantum Operations Model (QOM) is an original cost-accounting framework developed bythe author across three prior papers in this series: "Time Is Money: Wall-Clock Economics ofFault-Tolerant Quantum Computation," "The Decoder Is Architecture: Classical Bottlenecks inFault-Tolerant Quantum Systems," and "Show Me the Numbers: Concrete Costs of QuantumOperations." All three are available on Zenodo and Academia.edu. The QOM source code isavailable at github.com/kase1111-hash.² Throughout this paper, "QEC overhead" refers to the combined physical-to-logical qubit ratioand the code-distance time multiplier required to achieve a target logical error rate — thequantity introduced in the first Quantum Audit paper as the "error correction tax."
Quantum computing promises to revolutionize several scientific and industrial domains by tackling problems that are intractable for classical supercomputers. At the centre of this effort is the quantum processor unit (QPU), implemented today across multiple physical qubit platforms. This review provides a comparative analysis of the state of quantum processors as of late 2024/early 2025, focusing on superconducting qubits, trapped ions, photonic systems, neutral atoms, silicon spin qubits, and emerging topological approaches. We compile and compare recent processor generations such as IBM’s Heron family, Google’s updated Sycamore-class devices, Quantinuum’s H-series, IonQ’s Aria and Forte, neutral-atom platforms with more than 1,000 trapped atoms, and silicon spin prototypes like Tunnel Falls. Key performance metrics, including qubit count, gate and readout fidelity, coherence time, operation speed, and holistic benchmarks such as Quantum Volume (QV) and Algorithmic Qubits (#AQ) are examined with reference to concrete experimental milestones. We discuss algorithmic capabilities demonstrated on current hardware, early realizations of logical qubits and fault-tolerant primitives, and the distinction between feasibility-oriented “quantum advantage” experiments and emerging signs of practical “quantum utility”. Finally, we outline the main technical bottlenecks for each platform on the path from today’s NISQ devices toward universal fault-tolerant quantum computers.
As quantum computers advance toward the regime of MegaQuOp machines executing millions of gates, a decoding system capable of real-time error correction in such a device will be crucial. Recent efforts have been focused on decoding an error-corrected memory or a small number of logical operations. Here we demonstrate an end-to-end real-time decoding stack for a universal fault-tolerant trapped-ion quantum computer architecture capable of decoding real workloads with millions of logical gates over hundreds of logical qubits. The complete pipeline, including on the fly detector error model generation, decoding of all logical qubits, logical operations, and magic-state factories, runs on a single CPU. We benchmark the decoder on practically relevant quantum applications spanning up to 408 logical qubits, and up to one million TTT gates. Assuming a trapped-ion architecture with 1 to 5 ms cycle time, the decoding delay stretches the computation by less than 0.3%0.3\%0.3% at pCNOT=10−4p_{\mathrm{CNOT}}=10^{-4}pCNOT​=10−4 and less than 12%12\%12% at pCNOT=5×10−4p_{\mathrm{CNOT}}=5\times 10^{-4}pCNOT​=5×10−4 for all workloads studied. These results demonstrate real-time decoding at MegaQuOp scale on a single conventional CPU.
Quantum computing hardware is advancing rapidly toward utility-scale machines that will enable scientific breakthroughs. Many teams are pursuing distinct and difficult-to-compare routes to this goal, using different qubit technologies and logical architectures. Tracking progress toward quantum utility therefore requires rigorous benchmarks that measure computational capability relative to utility-scale challenge problems and enable fair comparison across disparate platforms. Here we demonstrate direct, cross-platform measurement of quantum computational capability using a new benchmark that quantifies the size of the largest computationally relevant quantum circuits that a machine can execute successfully and the speed at which it can execute them. We apply this quantum universal operation performance system (QUOPS) experimentally to leading processors from Quantinuum, Google, and IBM, computing directly on physical qubits. Translating state-of-the-art resource requirements for recognized challenge problems that represent useful quantum computation into effective QUOPS circuit sizes shows that computational capability must grow by 5 orders of magnitude, motivating fault-tolerant approaches. We use the same benchmark to assess the performance of a simple fault-tolerant logical-qubit processor implemented on up to eight [[7,1,3]]-encoded logical qubits using Quantinuum Helios-1, and project the growth of capability across successive generations of fault-tolerant quantum computers to show how QUOPS can track progress toward quantum scientific utility.
Quantum information processing has moved, within the space of roughly two years, from a discipline defined by extrapolation to one defined by measurement. This review consolidates and critically appraises the technical and commercial state of the field as it stood in mid-2026. Four developments frame the analysis: the demonstration of verifiable computational advantage on superconducting hardware through observable-based echo protocols in April 2026; the extension of advantage claims into the simulation of heterogeneous quantum materials in July 2026; the operation of surface-code memories below the fault-tolerance threshold; and the completion of the first tranche of standardised post-quantum cryptographic primitives. Against these advances the review sets an equally important body of negative evidence — systematic benchmark studies in which classically tractable formulations of putative quantum use cases were solved to proven optimality in seconds, and the withdrawal of at least one major financial institution from quantum research after resource estimation placed its target problem beyond any plausible machine. The paper surveys six physical qubit modalities, evaluates them against criteria that extend well past raw qubit count, examines the principal algorithmic families and their known limitations, assesses the software and cloud-access ecosystem, analyses the cryptographic migration timeline in policy and engineering terms, and reviews error-correction progress from repetition codes through quantum low-density parity-check constructions. The central conclusion is that the field has entered a period in which scientific advantage is demonstrable but economic advantage is not, and that the interval between the two will be governed less by qubit counts than by logical error rates, compilation overheads, and the availability of trained personnel.
Quantum error correction (QEC) is beginning to enable logical operations that outperform their unencoded physical counterparts, but useful fault-tolerant computation will require more than low-error quantum memory. An effective architecture must orchestrate efficient logical encoding, low-overhead logical operations, and access to the non-Clifford resources required for universal computation. Here, we introduce and experimentally validate such an architecture based on the [[20,2,6]][[20,2,6]][[20,2,6]] C4C_4C4​-Helix code, designed for the early fault-tolerant regime. Using Quantinuum Helios, a 98-qubit trapped-ion quantum processor, we experimentally demonstrate the principal components of this architecture: we perform repeated quantum error correction with an error of 4.6−2.6+6.2×10−54.6^{+6.2}_{-2.6}\times10^{-5}4.6−2.6+6.2​×10−5 per logical qubit per QEC cycle. We benchmark the complete Clifford group on the two logical qubits of a single codeblock under active error correction, obtaining an error of 2.8−1.6+1.0×10−42.8^{+1.0}_{-1.6}\times 10^{-4}2.8−1.6+1.0​×10−4 per two-qubit logical Clifford. We further demonstrate a fault-tolerant chain-map interface between C4C_4C4​-Helix and a distance-5 surface code, preparing a heterogeneous three-logical-qubit GHZ state with a fidelity lower bound of 99.925−0.245+0.068%99.925^{+0.068}_{-0.245}\%99.925−0.245+0.068​%. In each case, the encoded implementation outperforms its corresponding unencoded physical baseline without relying on postselection. Circuit-level simulations indicate that improvements in physical fidelity bring the same architecture into the 10−610^{-6}10−6-10−810^{-8}10−8 logical-error regime targeted for early fault-tolerant computation. Together, these results establish C4C_4C4​-Helix as a hardware-validated fault-tolerant architecture rather than a bare quantum memory.