The prospects for a utility-scale, fault-tolerant superconducting quantum computer have grown increasingly promising through demonstrations of quantum advantage and quantum error correction. The next breakthrough will likely be driven by processors at scale, with qubit counts exceeding tens of thousands. Achieving this scale presents a formidable challenge for current architectures, including limitations in chip footprint, cryogenic cooling capacity, and control complexity. One approach to alleviating these constraints is to make each qubit better, thereby reducing the redundancy required for error correction. Protected qubits provide a promising path in this direction by encoding quantum information into a decoherence-free subspace. This can be achieved through Hamiltonian engineering in superconducting circuits, with representative examples including the 0–π qubit, the cos(2φ) qubit, and the GKP qubit. In this thesis, we present the superconducting grid states qubit, or gridium, as a strong candidate for protected qubits. The gridium consists of a Cooper-quartet tunneling element shunted by a quantum phase slip element. We show that the gridium realizes a decoherence-free subspace within a single mode and can achieve strong protection using readily available superconducting circuit elements. We further demonstrate that its key components—Cooper-quartet tunneling and quantum phase slip—can be realized and engineered through appropriate circuit design, as illustrated with a prototype device. By applying Hamiltonian engineering, we construct three gridium devices with varying levels of protection. We show that the measured spectra are consistent with numerical simulations of the theoretical model. From these fits, we extract the corresponding wavefunctions and observe enhanced protection as the number of grids increases. To directly probe this protection, we measure the depolarization times of the devices while dynamically tuning the protection via flux control. Our best device exhibits T1 = 2.4 ms, comparable to state-of-the-art superconducting qubits. The gridium architecture presented in this thesis demonstrates strong potential for realizing fault-tolerant quantum processors based on protected qubits.
The prospects for a utility-scale, fault-tolerant superconducting quantum computer have grown increasingly promising through demonstrations of quantum advantage and quantum error correction. The next breakthrough will likely be driven by processors at scale, with qubit counts exceeding tens of thousands. Achieving this scale presents a formidable challenge for current architectures, including limitations in chip footprint, cryogenic cooling capacity, and control complexity. One approach to alleviating these constraints is to make each qubit better, thereby reducing the redundancy required for error correction. Protected qubits provide a promising path in this direction by encoding quantum information into a decoherence-free subspace. This can be achieved through Hamiltonian engineering in superconducting circuits, with representative examples including the 0–π qubit, the cos(2φ) qubit, and the GKP qubit. In this thesis, we present the superconducting grid states qubit, or gridium, as a strong candidate for protected qubits. The gridium consists of a Cooper-quartet tunneling element shunted by a quantum phase slip element. We show that the gridium realizes a decoherence-free subspace within a single mode and can achieve strong protection using readily available superconducting circuit elements. We further demonstrate that its key components—Cooper-quartet tunneling and quantum phase slip—can be realized and engineered through appropriate circuit design, as illustrated with a prototype device. By applying Hamiltonian engineering, we construct three gridium devices with varying levels of protection. We show that the measured spectra are consistent with numerical simulations of the theoretical model. From these fits, we extract the corresponding wavefunctions and observe enhanced protection as the number of grids increases. To directly probe this protection, we measure the depolarization times of the devices while dynamically tuning the protection via flux control. Our best device exhibits T1 = 2.4 ms, comparable to state-of-the-art superconducting qubits. The gridium architecture presented in this thesis demonstrates strong potential for realizing fault-tolerant quantum processors based on protected qubits.
Decoherence errors arising from noisy environments remain a central obstacle to progress in quantum computation and information processing. Quantum error correction (QEC) based on the Gottesman-Kitaev-Preskill (GKP) protocol offers a powerful strategy to overcome this challenge, with successful demonstrations in trapped ions, superconducting circuits, and photonics. Beyond active QEC, a compelling alternative is to engineer Hamiltonians that intrinsically enforce stabilizers, offering passive protection akin to topological models. Inspired by the GKP encoding scheme, we implement a superconducting qubit whose eigenstates form protected grid states - long envisioned but not previously realized - by integrating an effective Cooper-quartet junction with a quantum phase-slip element embedded in a high-impedance circuit. Spectroscopic measurements reveal pairs of degenerate states separated by large energy gaps, in excellent agreement with theoretical predictions. Remarkably, our observations indicate that the circuit tolerates small disorders and gains robustness against environmental noise as its parameters approach the ideal regime, establishing a new framework for exploring superconducting hardware. These findings also showcase the versatility of the superconducting circuit toolbox, setting the stage for future exploration of advanced solid-state devices with emergent properties.
Quantum computing holds the promise of solving classically intractable problems. Enabling this requires scalable and hardware-efficient quantum processors with vanishing error rates. This perspective manuscript describes how bosonic codes, particularly grid state encodings, offer a pathway to scalable fault-tolerant quantum computing in superconducting circuits. By leveraging the large Hilbert space of bosonic modes, quantum error correction can operate at the single physical unit level, therefore reducing drastically the hardware requirements to bring fault-tolerant quantum computing to scale. Going beyond the well-known Gottesman-Kitaev-Preskill (GKP) code, we discuss how using multiple bosonic modes to encode a single qubit offers increased protection against control errors and enhances its overall error-correcting capabilities. Given recent successful demonstrations of critical components of this architecture, we argue that it offers the shortest path to achieving fault tolerance in gate-based quantum computing processors with a MHz logical clock rate.
Quantum computing holds the promise of solving problems that are intractable for classical computers, with applications ranging from optimization and materials simulation to cryptography. It achieves this by leveraging the exponentially scaling dimensionality of the space encoding quantum information and by executing algorithms on quantum registers in superposition states – a feature often referred to as quantum parallelism. However, while encoding information in computational units capable of exploring a continuous set of quantum states enables exponential scaling of computational power with system size, quantum systems are also more susceptible to errors than their classical counterparts. These errors take the form of both control errors, where miscalibration of the control pulses causes coherent errors on the qubit states, as well as incoherent errors due to energy relaxation and dephasing. Scaling quantum systems to run useful algorithms involving hundreds or thousands of logical qubits will require quantum error correction. In this approach, quantum information is redundantly encoded across an entangled state of many physical qubits. This has enabled experimental demonstrations across various platforms – including ion traps, superconducting circuits, and neutral atoms – showing that encoded quantum states can be preserved beyond the coherence times of the constituting physical qubits. However, quantum state preservation is only one component needed for scalable quantum computing. To execute algorithms, it is also necessary to implement quantum gates on and between encoded qubits, in a way that maintains fault tolerance by preserving the ability to correct errors as they occur during the computation. In the first part of this thesis, we demonstrate the implementation of an error-corrected quantum operation that entangles two logical qubits. This is achieved by performing lattice surgery on a distance-three surface code qubit, resulting in a logical Bell state encoded in distance-three repetition codes, which enable the correction of single bit-flip errors. We further introduce techniques to benchmark and characterize the performance of logical operations, including applying the protocol to arbitrary logical input states and performing logical quantum process tomography. Together, these results constitute one of the first realizations of error-corrected lattice surgery in superconducting circuits. While quantum error correction can correct errors provided they occur with sufficiently low frequency, it may fail when many qubits experience errors simultaneously. In the second part of this thesis, we therefore shift focus to a specific error mechanism known to cause correlated errors in superconducting circuits – quasiparticle-induced decoherence. In this case, various forms of energy deposition on the quantum device can break Cooper pairs into quasiparticles, which may subsequently diffuse to the tunnel junction and interact with the qubit state, thereby causing decoherence. In this thesis, we investigate the impact of quasiparticle tunneling on qubit performance, with a focus on infrared-induced quasiparticles. We compare the sensitivity of niobium-based qubits to those made from tantalum – a material that has gained interest in recent years following demonstrations of qubits with improved coherence times based on this material. Using a thermal radiator source, we show that the performance of tantalum qubits may be limited by infrared-induced quasiparticles in typical superconducting circuit experimental setups. By employing both ambient and in-line infrared filters, we investigate the effectiveness of different filtering strategies and develop best practices for engineering cryogenic environments for superconducting quantum processors. The results presented in this thesis contribute to the advancement of quantum computing based on superconducting circuits by implementing and characterizing quantum error-corrected operations, and by investigating quasiparticles as a source of decoherence, along with strategies to improve infrared filtering and signal conditioning in cryogenic environments for future fault-tolerant quantum computing.
Abstract: This study investigates the feasibility of exploiting macroscopic quantum tunnelling (MQT) in superconducting circuits as a constructive resource for fault-tolerant quantum computing. While MQT has historically been treated as a decoherence pathway associated with metastable escape and switching events, recent advances in circuit engineering suggest that controlled access to tunnelling dynamics can be integrated into protected qubit modalities and error-mitigating architectures. The present framework synthesizes quantum escape theory, circuit Hamiltonian models, and contemporary fault-tolerance criteria to propose an experimentally realistic pathway for harnessing MQT-driven transitions as calibrated, monitorable events that can support syndrome extraction and bias-preserving logical operations. A methods blueprint is developed that combines cryogenic device characterization, time-resolved switching statistics, and noise spectroscopy with scalable surface-code-inspired performance projections. Using literature-aligned representative device parameters, the results illustrate how barrier engineering and bias-point optimization can reshape the MQT rate landscape while maintaining coherence metrics compatible with microsecond-scale error-correction cycles. The analysis indicates that decoupling the tunnelling coordinate from dominant low-frequency noise sources and implementing fast, quantum-limited readout may enable an error budget in which MQT transitions become part of a controlled operational envelope rather than a catastrophic failure mode. The study concludes with design rules, limitations, and a roadmap for validating MQT-assisted fault-tolerant primitives in next-generation superconducting quantum processors. Keywords: macroscopic quantum tunnelling; superconducting circuits; fluxonium; fault tolerance; surface code; noise spectroscopy; Josephson junctions; quantum error correction.
Hybrid semiconductor-superconductor qubits have recently emerged as a promising alternative to traditional platforms, combining material advantages with device-level tunability. A defining feature is their gate-tunable Josephson coupling, enabling superconducting qubit architectures with full electric-field control and offering a path toward scalable, low-crosstalk quantum processors. This approach seeks to merge benefits of superconducting and semiconductor qubits, for instance by encoding quantum information in the spin of a quasiparticle occupying an Andreev bound state, thus combining long coherence times with fast, flexible control. Progress has accelerated through bottom-up engineering of Andreev states in coupled quantum dot arrays, leading to architectures such as minimal Kitaev chains hosting Majorana zero modes. In parallel, Hamiltonian-protected designs aim to enhance resilience against local noise and decoherence by exploiting superconducting phase dynamics and discrete charge or flux degrees of freedom. This article reviews recent theoretical and experimental advances in hybrid qubits, providing an overview of physical mechanisms, device implementations, and emerging architectures, with emphasis on their potential for (topologically) protected quantum information processing. While many designs remain at proof-of-concept stage, rapid progress suggests practical demonstrations may soon be achievable.
Quantum error correction of a grid-state qubit with state preparation and measurement errors below 10−3
Grid state qubits offer a hardware-efficient approach to large-scale fault-tolerant quantum computing. They access the information redundancy required for quantum error correction by exploiting the large Hilbert space naturally available in harmonic oscillators. Superconducting architectures are particularly suitable to implement grid state qubits due to their fast and high-fidelity operations. Grid states in superconducting circuits enable quantum error correction (QEC) with performance beyond break-even. However, the state preparation and measurements (SPAM) errors of grid states has been a significant limitation to computational performances. In this work, we leverage high-performance QEC to enable repeat-until-success state preparation of both cardinal and magic states of the single-mode grid-state qubit. We combine this with an improved measurement protocol that corrects for both finite-energy envelope and auxiliary qubit readout errors, and increases robustness to photon loss. Our experiments, using both techniques, achieve a combined state-preparation and measurement error below 10−3. This represents two orders-of-magnitude improvement over the state of the art, bringing this platform on par with standard SPAM error levels measured in transmon qubits.