This paper takes the first step towards hardware evidence for The Quantum Pi Benchmark (QPB) under its provenance (P) and blindness (B) axes and non-total capability grid (R). Using IBM Heron r2 Quantum Processing Units (QPUs), this paper reports findings to support P0/B0/R2 compiled-address amplification and P1/B0/R3 only for the loaded-content equality-predicate family, spanning 220 logical results and 324 job records. In the compiled-address family, single-iteration efficiency is approximately 66% through 110 routed CZ gates and falls to roughly 15% at the traceable larger instances. The two recoverable N = 512, k = 1 executions used 270 CZ gates and returned 84 marked outcomes in 32,768 shots, or 0.256% (95% Wilson interval 0.207%–0.317%), 1.31 times the uniform expectation. Matched true, scrambled, and zero controls show that this signal amplifies a compiled mark rather than evaluating Pi content. A content-addressed Quantum Read Only Memory (QROM) bridge and a coherent block-equality negative result are retained as P1/B0 diagnostics. Loaded-content equality separates supplied Pi blocks from corrupted controls: the monolithic discrimination gap decreases from 0.780 at six bits to 0.132 at 24 bits. Across three matched transpiler placements, tiled equality gives gaps of 0.761 ± 0.004, 0.404 ± 0.153, 0.344 ± 0.037, and 0.128 ± 0.034 at 6, 12, 18, and 24 bits, respectively, where uncertainties are descriptive sample standard deviations. The replicated mean routed-cost reduction is 29%–41%. Phase-pair circuits are classified as P1/B0 diagnostics rather than R3: five non-overlapping spans per control, ten circuits total, were submitted in one quantum hardware job. They recover 106/106 expected signs in each control with mean edge magnitudes 0.964 and 0.951. These are bounded results that do not establish direct digit access, controller-blind search, collision finding, frontier performance, or end-to-end advantage.
This paper takes the first step towards hardware evidence for The Quantum Pi Benchmark (QPB) under its provenance (P) and blindness (B) axes and non-total capability grid (R). Using IBM Heron r2 Quantum Processing Units (QPUs), this paper reports findings to support P0/B0/R2 compiled-address amplification and P1/B0/R3 only for the loaded-content equality-predicate family, spanning 220 logical results and 324 job records. In the compiled-address family, single-iteration efficiency is approximately 66% through 110 routed CZ gates and falls to roughly 15% at the traceable larger instances. The two recoverable N = 512, k = 1 executions used 270 CZ gates and returned 84 marked outcomes in 32,768 shots, or 0.256% (95% Wilson interval 0.207%–0.317%), 1.31 times the uniform expectation. Matched true, scrambled, and zero controls show that this signal amplifies a compiled mark rather than evaluating Pi content. A content-addressed Quantum Read Only Memory (QROM) bridge and a coherent block-equality negative result are retained as P1/B0 diagnostics. Loaded-content equality separates supplied Pi blocks from corrupted controls: the monolithic discrimination gap decreases from 0.780 at six bits to 0.132 at 24 bits. Across three matched transpiler placements, tiled equality gives gaps of 0.761 ± 0.004, 0.404 ± 0.153, 0.344 ± 0.037, and 0.128 ± 0.034 at 6, 12, 18, and 24 bits, respectively, where uncertainties are descriptive sample standard deviations. The replicated mean routed-cost reduction is 29%–41%. Phase-pair circuits are classified as P1/B0 diagnostics rather than R3: five non-overlapping spans per control, ten circuits total, were submitted in one quantum hardware job. They recover 106/106 expected signs in each control with mean edge magnitudes 0.964 and 0.951. These are bounded results that do not establish direct digit access, controller-blind search, collision finding, frontier performance, or end-to-end advantage.
The Quantum Pi Benchmark separates oracle-construction provenance (P0–P4), controller blindness (B0 or B1), and a non-total capability grid (R). Quantum search over digit patterns requires an oracle that preserves an address superposition while computing address-dependent data. This paper describes testing of that requirement for low hexadecimal digits of Pi using Bailey–Borwein–Plouffe (BBP)-derived reversible arithmetic on IBM Heron r2 QPU, Kingston. Two direct multiplexed constructions fail at 738–1038 routed native CZ gates despite exact noiseless validation. A prefix compute–uncompute echo localizes a selected implementation’s collapse to the second multiplexed stage. Reachable-cone synthesis restricts exactness to declared protected trajectories and reduces the core to 47 routed native CZ gates. Across eighteen runs, per-branch digit success is 0.69–0.84, cross-pair support remains below 0.02, and roundtrip return is 0.56–0.74; these jointly support a preserved address-conditioned structure, while the correlation gap alone is not a coherence proof. A P0/B0/R2 compiled Grover layer amplifies Pi-table offsets: sixteen-candidate bands return the mark at 0.618–0.688, and ten 64-candidate single-iteration runs return it at 2.2–2.9 times the uniform reference. A separate 34-decision outer loop correctly classifies occupied versus empty tiles, but fails its original earliest-position objective, and is therefore reported as tile-occurrence classification. At a fixed four-position tile, one declared comparator consumes a BBP-computed digit; target rotation and Ramsey controls support P3/B0/R5. The final thirteen-tile campaign uses execution-locked BBP bodies and target-independent phase calibration, however, known codewords select or omit its discriminator and only planner-positive tiles receive confirmation. The final campaign supports a bounded P4/B0/R6 range validation.
The Quantum Pi Benchmark (QPB) is a family of verification, search, counting, frequency-estimation, and collision tasks over the digits of Pi. It is designed as an architecture-neutral specification of mathematically fixed instances, classical comparators, resource boundaries, and admissible claims. The specification fixes zero-based indexing, binary and hexadecimal digit conventions, dense and sparse candidate domains, and task-specific payloads for target-bearing and collision problems. It separates three independent properties that benchmark descriptions can conflate: digit access (lookup or direct), oracle-construction provenance (P0–P4), and controller blindness (B0 or B1). A non-total capability grid retains codes R0–R12 as stable claim labels while stating their named dependencies; a higher-numbered code does not automatically inherit every lower-numbered capability. The evidence protocol requires pre-execution validation, routed-resource accounting, preservation of raw outcomes, outcome-independent eligibility, visible conditioning, uncertainty estimates, protocol separation, and formal record freezing. Collision scaling is stated as a heuristic candidate-domain model: birthday behavior gives D_h = Θ(16^(h/2)), while element distinctness gives O(D_h^(2/3)) coherent queries only under declared access and memory assumptions. These query bounds do not establish the earliest repeat, a quantum frontier, or end-to-end advantage. Frontier status depends on a current classical post-hoc resource audit; advantage requires a predeclared matched cost comparison that includes preparation, oracle construction, error correction, sampling, readout, and verification. The resulting framework classifies future Pi-derived experiments without importing device-specific performance into the foundational definition.
Despite rapid progress in quantum optimization, broad real-hardware benchmarks comparing multiple algorithmic families across diverse combinatorial problems under a common protocol remain limited. We benchmark gate-based quantum optimization on four NP-hard problems: multi-dimensional knapsack (MDKP), maximum independent set (MIS), quadratic assignment (QAP), and market-share (MSP). We study VQE, CVaR-VQE, standard, multi-angle, and warm-start QAOA, together with qubit-efficient PCE and QRAO, on IBM Heron r1/r2 processors using resilience-level-2 mitigation. To our knowledge, this includes the first real-hardware QRAO results and the first multi-problem PCE hardware benchmark.
Across 247 method-instance combinations, we report transpiled circuit size, hardware outcomes, and an independent-error gate-count fidelity proxy, Fest. For MDKP and MIS, an empirical operating point near Fest≈0.1, corresponding to about 770 two-qubit gates at the median Heron-r2 CZ error rate, marks the onset of noise-dominated execution. QAP exposes a separate bottleneck: dense one-hot encodings and an exponentially sparse feasible manifold, with feasible fraction 10!/2100 at n=10; no tested hardware method produces a feasible assignment. Compiled QAOA-family circuits are generally noise dominated, and a matched uniform-random control shows that most feasible low-fidelity outcomes fall within the random range, apart from one finite-sample MIS warm-start exception. A SWAP-aware, fractional-gate, Nighthawk-topology compilation counterfactual reduces two-qubit counts but leaves all circuits below Fest=10−3. These conclusions apply to the tested implementations rather than QAOA in general. Qubit-efficient methods extend runnable instance sizes, but only within the empirical fidelity budget.
The Quantum Pi Benchmark (QPB) separates oracle-construction provenance, controller blindness, demonstrated capability, execution layer, and provider access rather than compressing them into a vendor score. This paper tests whether the architecture-neutral information flow established in the Benchmark can be carried through additional provider stacks, using Microsoft Azure’s platform, and records the point at which each accessible path stops. The frozen record contains 20 accepted analysis rows mapped to 16 unique jobs: fourteen Rigetti ideal Quantum Virtual Machine (QVM) jobs and two Quantinuum H2-1E noisy-emulator jobs. It contains zero quantum processing unit (QPU) jobs. The Rigetti campaign implements an N = 4, one-iteration search and an eight-job control suite through logical Quil and Azure-hosted quilc/QVM. Six candidate circuits return the marked address in 256/256 shots; matched-search and no-hit controls remain near the 1/4 reference, two Ramsey controls return their expected event in 1,024/1,024 shots, and four basis roundtrips return 1,024/1,024. The evidence supports P3/B0 validation but no hardware rung or hardware-evidence claim. The Quantinuum campaign validates all sixteen finite Bailey–Borwein–Plouffe (BBP) arithmetic trajectories, compiles N = 16 provenance class 3 / blindness class 0 / capability-rung 5 (P3/B0/R5)-candidate circuits into an H2-native basis, audits provider Open Quantum Assembly Language (OpenQASM) transport, and executes them on H2-1E. Native compilation expanded depth from 464 to 5,856 and produced 6,614–11,568 ZZPhase gates. Search target frequencies were 1/32 and 0/16 against the ideal 0.90845, while the compute–uncompute roundtrip returned the expected all-zero state in 0/16 shots. These eligible negative outcomes locate an execution boundary on the tested circuit-and-model path without implying an H2 hardware result. These results support the feasibility of QPB interrogation across differently designed provider stacks.
This paper reports the frozen IBM Heron r2 hardware evidence for fixed-position Bailey–Borwein–Plouffe (BBP)-derived reversible arithmetic in the Quantum Pi Benchmark. The evidence is classified P2/B0/R4: formula-derived constants and routing decisions are known to the controller, while reversible arithmetic on the quantum processor produces a hexadecimal digit at a predeclared position. The implemented finite-precision construction classically collapses each of four BBP sub-sums, rounds the four resulting residues to b bits, initializes one residue, and performs three reversible constant additions. The author formally defines this arithmetic, proves a circular quantization-error bound of , bounds the omitted BBP tail, and gives exact rational certificates for reported positions. Comparable first- and second-digit cohorts are included in the evidence ledger. Timestamped static records show that routing choices used compilation metrics before the corresponding hardware executions. The initial six-position campaign recovered the correct plurality for n=0,…,5, with negative repeats retained at n=2 and n=4. Guarded finite-window circuits recovered n=11,17,23 at correct-digit frequencies of 0.539–0.611 while reducing routed CZ counts by 54–70% relative to paired full-width circuits. Exact conditional plurality tests remain significant after Holm correction for the declared primary families. A normalized 257-row manifest maps the retained logical results to 249 QPU jobs and records missing routed artifacts explicitly. The results establish bounded fixed-position arithmetic.
We present the resource estimation of how known-constant arithmetic changes the cost of a Grover oracle for Minecraft 1.13.1 seed recovery, an application of quantum search to procedural content generation. The oracle developed here combines a structure-placement predicate with a reversible inverse transform of the linear congruential generator for the 32-bit residual search. Reduced-width arithmetic, phase marking, uncomputation, and complete Grover loops are verified against an independent Java reference, while production-width circuits are structurally audited. Direct Fourier-basis constant arithmetic reduces the placement-predicate width from 6n+3 to 4n+3 qubits and the structural scaling of the two-qubit gate counts from Theta(n^3) to O(n^2). Under backend-agnostic common-basis Qiskit level-0 {u, CX} accounting, the representative nonzero-r folded residual-search construction uses 275 circuit qubits, 48,896 CX gates, and depth 4,482, versus 467 qubits, 2,038,804 CX gates, and depth 186,328 for the original register-to-register baseline. Multi-placement conjunctions expose a width-recomputation tradeoff, and exact enumeration identifies a plateau in candidate reduction for the benchmark. We executed reduced-width placement circuits within complete Grover loops on IBM processors and Quantinuum H2-1 and show larger one-iteration increases in marked-state probability for the specialized construction than for the baseline. These results quantify the resource benefits of arithmetic specialization and show substantial routing sensitivity in the reduced-width IBM hardware experiments. Together, the results quantify the effect of specializing known-constant arithmetic within a PCG-derived oracle and show that its compiled hardware behavior strongly depends on routing and execution context.