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Three Routes to Zero-Overhead Non-Clifford Gates on the SQU Architecture

Ian Richard C Buckley

Published Jun 7, 2026• 0 citations
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Abstract

PENDING QUALITY AUDIT (2026-08). The file is restricted while this record is reviewed as part of a systematic audit of the author's corpus. It has not yet been assessed. Metadata and DOI remain public, and access can be requested. The Eastin-Knill theorem states that no quantum error correcting code can have a universal set of transversal gates. This is widely interpreted as requiring magic-state distillation (MSD) as an unavoidable overhead for fault-tolerant non-Clifford computation. This paper demonstrates three distinct routes to CS-family non-Clifford gates on the SQU architecture that circumvent the practical impact of Eastin-Knill without violating it. Route 1 — Gauge-orbit CS transversality: The [[7,1,3]] Steane code has 6 gauge degrees of freedom corresponding bijectively to the 6 non-classical Fano orbit valences. Preparing the gauge subsystem in orbit valence L ∈ {1,2,3} via the DISTIL opcode enables transversal application of CS_{ij} — the qubit pair associated with orbit L — across all 7 physical qubit triplets simultaneously. This implements a logical CS gate fault-tolerantly at 7 physical qubits, versus 15 for the [[15,1,3]] Reed-Muller approach, with zero magic-state distillation and zero code switching. Route 2 — CONVERT as free valence switching: The CONVERT opcode is a free Clifford gate that switches orbit valence within the primary family {1,2,3} or secondary family {4,5,6}. Any CS-type gate is reachable from any other via one SWAP gate, at zero distillation cost. The gauge-orbit correspondence makes CS-family universality a matter of gauge selection, not resource consumption. Route 3 — Syndrome-blind valence verification: The CS₀₁, CS₀₂, and CS₁₂ states are indistinguishable by stabiliser syndrome (all produce syndrome (+1)⁷) but are perfectly distinguished by the ORBIT opcode. This enables fault-tolerant gate verification at zero additional syndrome cost — the ORBIT measurement is performed on the same 7 qubits already measured for error correction. Together these routes reduce the physical qubit overhead for CS-family computation from 15 to 7, eliminate MSD entirely for CS gates, and provide built-in coherent error detection. The Eastin-Knill theorem is respected: the CS gate is not transversal in the code sense. What changes is the architecture — the gauge structure of the Steane code is the resource, not ancilla magic states. Keywords Eastin-Knill Theorem, Transversal Gates, Magic State Distillation, Fault-Tolerant Quantum Computation, CS Gate, Controlled-S Gate, Steane Code, [[7,1,3]] Code, Gauge Selection, Fano Orbit Valence, Orbit Valence, ORBIT Opcode, DISTIL Opcode, CONVERT Opcode, Magic-ISA, SQU Architecture, TriQ, Quantum Error Correction, Syndrome Blindness, Non-Clifford Gates, Gauge Subsystem, W(5,2), Fano Plane, PG(2,2), Origami ISA, Zero Overhead, Coherent Error Detection

DOI
10.5281/zenodo.20581494

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PENDING QUALITY AUDIT (2026-08). The file is restricted while this record is reviewed as part of a systematic audit of the author's corpus. It has not yet been assessed. Metadata and DOI remain public, and access can be requested. The Eastin-Knill theorem states that no quantum error correcting code can have a universal set of transversal gates. This is widely interpreted as requiring magic-state distillation (MSD) as an unavoidable overhead for fault-tolerant non-Clifford computation. This paper demonstrates three distinct routes to CS-family non-Clifford gates on the SQU architecture that circumvent the practical impact of Eastin-Knill without violating it. Route 1 — Gauge-orbit CS transversality: The [[7,1,3]] Steane code has 6 gauge degrees of freedom corresponding bijectively to the 6 non-classical Fano orbit valences. Preparing the gauge subsystem in orbit valence L ∈ {1,2,3} via the DISTIL opcode enables transversal application of CS_{ij} — the qubit pair associated with orbit L — across all 7 physical qubit triplets simultaneously. This implements a logical CS gate fault-tolerantly at 7 physical qubits, versus 15 for the [[15,1,3]] Reed-Muller approach, with zero magic-state distillation and zero code switching. Route 2 — CONVERT as free valence switching: The CONVERT opcode is a free Clifford gate that switches orbit valence within the primary family {1,2,3} or secondary family {4,5,6}. Any CS-type gate is reachable from any other via one SWAP gate, at zero distillation cost. The gauge-orbit correspondence makes CS-family universality a matter of gauge selection, not resource consumption. Route 3 — Syndrome-blind valence verification: The CS₀₁, CS₀₂, and CS₁₂ states are indistinguishable by stabiliser syndrome (all produce syndrome (+1)⁷) but are perfectly distinguished by the ORBIT opcode. This enables fault-tolerant gate verification at zero additional syndrome cost — the ORBIT measurement is performed on the same 7 qubits already measured for error correction. Together these routes reduce the physical qubit overhead for CS-family computation from 15 to 7, eliminate MSD entirely for CS gates, and provide built-in coherent error detection. The Eastin-Knill theorem is respected: the CS gate is not transversal in the code sense. What changes is the architecture — the gauge structure of the Steane code is the resource, not ancilla magic states. Keywords Eastin-Knill Theorem, Transversal Gates, Magic State Distillation, Fault-Tolerant Quantum Computation, CS Gate, Controlled-S Gate, Steane Code, [[7,1,3]] Code, Gauge Selection, Fano Orbit Valence, Orbit Valence, ORBIT Opcode, DISTIL Opcode, CONVERT Opcode, Magic-ISA, SQU Architecture, TriQ, Quantum Error Correction, Syndrome Blindness, Non-Clifford Gates, Gauge Subsystem, W(5,2), Fano Plane, PG(2,2), Origami ISA, Zero Overhead, Coherent Error Detection
CORRECTION NOTICE (2026-08). The figure "4.3× directed magic-routing efficiency", quoted three times and attributed to a companion paper, does not appear in that paper. It is unsourced and should be disregarded. A revised version is in preparation. The Origami Instruction Set Architecture (O-ISA) was introduced alongside a conjectural exotic hardware substrate — the Resonance Processing Unit (RPU) — requiring non-associative materials to support octonion computation. This paper establishes that the base Origami ISA requires no exotic hardware whatsoever. It runs today on any quantum processor supporting three-qubit gates: superconducting transmons, trapped ions, neutral atoms, and photonic chips. Two complementary architectural primitives are specified. The TriQ (Origami Triple) is the fundamental three-qubit register: three physical qubits in Fano-plane incidence connectivity, corresponding to one logical qubit in the [[7,1,3]] Steane code. The SQU (Symplectic Quantum Unit) is the full processor architecture built from TriQ registers, with the Magic-ISA opcode set and inter-register typed routing. The SevenQ is the complete seven-qubit Fano register: all seven points of PG(2,2) simultaneously realised, corresponding to the full [[7,1,3]] Steane code with its six gauge degrees of freedom corresponding bijectively to the six non-classical Fano orbit valences. The key diagnostic opcode is ORBIT: seven simultaneous Pauli measurements returning the Fano orbit valence label of the register state, replacing the conjectured Freudenthal determinant ALU with seven standard readout operations. The SQU achieves fault-tolerant universal quantum computation with 7 physical qubits per logical qubit for CS-family gates via gauge-orbit selection, and 15 for CCZ gates via code switch — both at zero magic-state distillation overhead. A critical non-obvious result: SevenQ ORBIT is identical to standard Steane syndrome extraction. The seven syndrome measurements already performed at every error correction cycle are the ORBIT opcode, with the orbit valence label computed in classical post-processing at zero additional hardware cost. Three hardware tiers are defined: SQU (standard qubits, available today), SQU-diode (6-7 directed Fano coupling topology, near-term), and RPU (non-associative materials, long-term). The SevenQ-diode variant applies the 6-7 broken-symmetry topology to the full seven-qubit register for directed magic routing at 4× symmetric efficiency. The paper also establishes the exploration order for the projective tower: TriQ (3 qubits, minimal n=3) → SevenQ (7 qubits, complete n=3) → 1531-Anvil (15 qubits, first n=4). Keywords Origami ISA, TriQ, SevenQ, SQU, Symplectic Quantum Unit, Fano Plane, PG(2,2), Magic-ISA, ORBIT Opcode, Steane Code, [[7,1,3]] Code, Fault-Tolerant Quantum Computation, Magic State Distillation, CS Gate, Gauge Selection, Quantum Error Correction, Coherent Error Detection, Magic Valence, Fano Orbit, Superconducting Qubits, Trapped Ions, Neutral Atoms, Quantum Hardware, Instruction Set Architecture, 6-7 Topology, Directed Magic Routing, SevenQ-Diode, SQU-Diode, Adelic Simplicial Architecture, Resonance Processing Unit
The Eastin-Knill theorem rules out a universal set of transversal logical gates on any code that detects single-qubit errors. The theorem constrains one partition of the qubits at a time. We show that depth-one layers of few-qubit gates, each respecting its own partition, can together generate a universal logical gate set on an error-correcting code. Each logical gate generator is then a single depth-one layer followed by error correction of the same stabilizer code, with no magic-state distillation, code switching, gauge fixing, lattice surgery, or other gadgets. We show that such codes can be found by applying an entangling circuit to a lower-distance "seed" code admitting a depth-one non-Clifford gate and an appropriate "kernel" code. We construct 47 codes with depth-one generating sets that tolerate at least one faulty gate per layer, including a [[37,1,7]] and a [[59,1,9]] code, both of check weight at most eight.
PENDING QUALITY AUDIT (2026-08). The file is restricted while this record is reviewed as part of a systematic audit of the author's corpus. It has not yet been assessed. Metadata and DOI remain public, and access can be requested. The Gottesman-Knill (GK) theorem establishes that Clifford circuits on stabiliser states are efficiently classically simulable. The simulability boundary is at zero magic: any state with positive Wigner negativity N(ρ) > 0 is beyond GK. This paper establishes that this boundary is not sharp enough. Two states can both lie beyond GK — both have N > 0 — yet differ in computational power in a precise, measurable way. The distinguishing invariant is the Fano orbit valence label {p_L}: the decomposition of the state's Wigner characteristic function over the seven orbit valences of the symplectic polar space W(5,2). The orbit valence provides a strictly finer simulability classification than total negativity N. The central new result is the magic valence mismatch theorem: injecting a magic state of the wrong orbit valence into a circuit that expects a different valence yields a winning probability of 0.472 in the Fano Line Verification Game — strictly below the 0.500 classical bound. Wrong-valence magic is not merely suboptimal; it is worse than no magic at all for the intended computation. Critically, this failure mode is invisible to syndrome-only decoders: CS₀₁, CS₀₂, and CS₁₂ states all produce identical stabiliser syndromes (+1)^7 but distinct orbit valence labels, detectable only by the ORBIT opcode. A valence-aware magic state factory using the ORBIT opcode accepts states by orbit valence, achieving distillation overhead O(1/p) per accepted state rather than the O(1/p²) of standard T-gate distillation — a ~1000× overhead reduction at physical error rate p = 10⁻³ for CS-family computations. The island graph picture of quantum circuit computation is introduced: entangled registers form islands connected by magic-carrying channels, and the computational power of the circuit is determined not by total magic N but by the magic current profile {I_L}. The ORBIT opcode serves as an ammeter for magic current: 7 Pauli measurements identify which orbit valences are flowing at each node. Keywords Gottesman-Knill Theorem, Classical Simulation, Magic State, Wigner Negativity, Fano Orbit, Magic Valence, Orbit Valence Label, W(5,2), Symplectic Polar Space, ORBIT Opcode, Magic State Distillation, CS Gate, Controlled-S Gate, Valence Mismatch, Island Graph, Magic Current, Fault-Tolerant Quantum Computation, Stabiliser Syndrome, Coherent Error Detection, Origami ISA, Magic-ISA, TriQ, SQU, Fano Plane, PG(2,2), Quantum Resource Theory, Simulability Boundary
PENDING QUALITY AUDIT (2026-08). The file is restricted while this record is reviewed as part of a systematic audit of the author's corpus. It has not yet been assessed. Metadata and DOI remain public, and access can be requested. Magic-state distillation (MSD) is the dominant overhead cost in fault-tolerant quantum computing: each logical T or CCZ gate currently requires 100–1,000 physical qubits dedicated to distillation, consuming the majority of a quantum processor's resources. This paper introduces the Origami Instruction Set Architecture (Origami ISA) as a compiler layer for fault-tolerant quantum error correction — operating on existing lattice surgery hardware without modification. The five opcodes — FLIP, FLOP, SPLIT, SPLAT, TWIST — operate at the logical level and compute exact symbolic (rational or algebraic) amplitudes via the thermion library, enabling algebraic verification of gate correctness before any physical circuit is generated. Three contributions: 1. Frobenius cancellation: The Frobenius axiom (SPLIT(j) ∘ SPLAT(j)= id) is an automatic compiler optimisation that detects and removes redundant merge-boundary open/close pairs in lattice surgery protocols, reducing physical gate count by 29–67% on standard protocols. 2. Regime ladder: Every quantum error-correcting code is classified by its F-move amplitudes. Rung-0 codes (stabiliser codes, surface codes) require MSD for non-Clifford gates. Rung-1 codes ([[15,1,3]] Reed-Muller, colour codes) support transversal non-Clifford gates with zero MSD overhead. The ladder predicts which hardware can eliminate MSD and which cannot. 3. Zero-MSD CCZ protocol: The SPLIT;FLOP;FLOP;CCZ;FLOP⁻¹;FLOP⁻¹;SPLAT protocol implements a universal CCZ gate on the combined [[7,1,3]] + 1531-Anvil hardware without any magic-state distillation. Machine-verified correctness via the Frobenius axiom and Pentagon identity, proved by exact symbolic arithmetic. The Pentagon identity holds exactly for all five codes examined — proving by exact symbolic arithmetic rather than numerical simulation. Keywords Origami ISA, Fault-Tolerant Quantum Computing, Magic State Distillation, Lattice Surgery, Frobenius Axiom, Pentagon Identity, Regime Ladder, CCZ Gate, Transversal Gates, Reed-Muller Code, [[15,1,3]] Code, Steane Code, [[7,1,3]] Code, 1531-Anvil, FLIP Opcode, FLOP Opcode, SPLIT Opcode, SPLAT Opcode, Quantum Compiler, Diagrammatic Calculus, Exact Arithmetic, Thermion Library, F-Move Amplitude, Colour Code, Surface Code, Quantum Error Correction, Zero Overhead
The Eastin-Knill theorem states that no quantum error-correcting code can have a universal set of transversal gates. For Calderbank-Shor-Steane codes that can implement Clifford gates transversally, it suffices to provide one additional non-Clifford gate, such as the T gate, to achieve universality. Common methods to implement fault-tolerant T gates, e.g., magic state distillation, generate a significant hardware overhead that will likely prevent their practical usage in the near-term future. Recently, methods have been developed to mitigate the effect of noise in shallow quantum circuits that are not protected by error correction. Error mitigation methods require no additional hardware resources but suffer from a bad asymptotic scaling and apply only to a restricted class of quantum algorithms. In this Letter, we combine both approaches and show how to implement encoded Clifford+T circuits where Clifford gates are protected from noise by error correction while errors introduced by noisy encoded T gates are mitigated using the quasiprobability method. As a result, Clifford+T circuits with a number of T gates inversely proportional to the physical noise rate can be implemented on small error-corrected devices without magic state distillation. We argue that such circuits can be out of reach for state-of-the-art classical simulation algorithms.
Fault tolerance is widely regarded as indispensable for achieving scalable and reliable quantum computing. However, the spacetime overhead required for fault-tolerant quantum computating remains prohibitively large. A critical challenge arises in many quantum algorithms with Clifford + φ\varphiφ compiling, where logical rotation gates RZL(φ)R_{Z_L}(\varphi)RZL​​(φ) serve as essential components. The Eastin-Knill theorem prevents their transversal implementation in quantum error correction codes and necessitating resource-intensive workarounds through T-gate compilation combined with magic state distillation and injection. In this work, we consider error-structure-tailored fault tolerance, where fault-tolerance conditions are analyzed by combining perturbative analysis of realistic dissipative noise processes with the structural properties of stabilizer codes. Based on this framework, we design 1-fault-tolerant continuous-angle rotation gates in stabilizer codes, implemented via dispersive-coupling Hamiltonians. Our approach could circumvent the need for T-gate compilation and distillation, offering a hardware-efficient solution that maintains simplicity, minimizes physical footprint, and requires only nearest-neighbor interactions. Integrating with recent small-angle-state preparation techniques, we can suppress the gate error to 91∣φ∣p291|\varphi| p^291∣φ∣p2 for small rotation angle (where p denotes the physical error rate). For current achievable hardware parameters (p=10−3p=10^{-3}p=10−3), this enables reliable execution of over 10710^7107 small-angle rotations when ∣φ∣≈10−3|\varphi|\approx 10^{-3}∣φ∣≈10−3, meeting the requirements of many near-term quantum applications. Compared to the 15-to-1 magic state distillation and magic state cultivation approaches, our method reduces spacetime resource costs by factors of 1337.5 and 43.6, respectively, for a Heisenberg Hamiltonian simulation task under realistic hardware assumptions.