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SIMULATION

Benchmarking quantum computing statevector simulators on high-performance computing

Jesús Cerrudo-Herrera, Daniel Talaván-Vega, Paloma Rodríguez-Oliver, Ahmed Ziabat-Ziabat, Juan‐Antonio Rico‐Gallego

Published Apr 22, 2026• 0 citations
Publisher

Abstract

The increasing complexity of quantum algorithms and the limitations of current Noisy Intermediate-Scale Quantum (NISQ) hardware underscore the importance of efficient classical simulators. To support informed decision-making by users of quantum circuit simulators, we benchmark seven statevector-based quantum circuit simulators (Qiskit, Qulacs, Qibo, Qsimov, Cirq, Pennylane and the Intel Quantum Simulator (IQS)) on a multicore node of the Lusitania high-performance computing (HPC) system. We evaluate their performance in terms of execution time, memory usage and core scalability using Grover’s algorithm, the quantum Fourier transform (QFT), and quantum volume (QV) circuits, across qubit counts ranging from 3 to 30. Our results reveal that Qulacs offers the best performance for circuits below 22 qubits, while Qiskit becomes the fastest for larger and more complex circuits. Qiskit and Qulacs achieve the most efficient parallel performance across multiple cores, while others display limited scaling benefits. IQS shows the lowest memory consumption in QFT and QV benchmarks for systems under 24 qubits; however, it suffers from higher execution times, particularly for Grover’s algorithm. The experimental implementation of Qsimov consistently underperforms in both runtime and scalability; for this reason, it is employed as a baseline in our measurements, serving to highlight the importance of performance optimizations in statevector-based quantum circuit simulators. Previous findings provide a comprehensive performance landscape to guide researchers in selecting appropriate simulators for both standard and large-scale quantum workloads on HPC infrastructures.

DOI
10.1177/00375497261438515

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The increasing complexity of quantum algorithms and the limitations of current Noisy Intermediate-Scale Quantum (NISQ) hardware underscore the importance of efficient classical simulators. To support informed decision-making by users of quantum circuit simulators, we benchmark seven statevector-based quantum circuit simulators (Qiskit, Qulacs, Qibo, Qsimov, Cirq, Pennylane and the Intel Quantum Simulator (IQS)) on a multicore node of the Lusitania high-performance computing (HPC) system. We evaluate their performance in terms of execution time, memory usage and core scalability using Grover’s algorithm, the quantum Fourier transform (QFT), and quantum volume (QV) circuits, across qubit counts ranging from 3 to 30. Our results reveal that Qulacs offers the best performance for circuits below 22 qubits, while Qiskit becomes the fastest for larger and more complex circuits. Qiskit and Qulacs achieve the most efficient parallel performance across multiple cores, while others display limited scaling benefits. IQS shows the lowest memory consumption in QFT and QV benchmarks for systems under 24 qubits; however, it suffers from higher execution times, particularly for Grover’s algorithm. The experimental implementation of Qsimov consistently underperforms in both runtime and scalability; for this reason, it is employed as a baseline in our measurements, serving to highlight the importance of performance optimizations in statevector-based quantum circuit simulators. Previous findings provide a comprehensive performance landscape to guide researchers in selecting appropriate simulators for both standard and large-scale quantum workloads on HPC infrastructures.
Nowadays, although quantum computers are a re-ality, they are still in early stages of development. The presence of noisy qubits as well as the difficulties in accessing them, make quantum computing simulators a need for the scientific community. There are several simulators available and, while each one usually list their own characteristics, there is a lack of reports about their performance on concrete systems. In this work we have executed the Intel Quantum Simulator (IQS) on the LUSITANIA supercomputer to evaluate its scalability with respect to both the number of qubits and the depth of the quantum circuits using two self-developed benchmarks. The same tests have been run on a personal computer (PC), used as a baseline. The conclusions indicate that for complex circuits with 13 qubits or more, the execution time on HPC systems is consistently lower than on a PC, achieving speedups of up to 98 %. In addition, using HPC systems allows for the simulation of circuits with a higher qubit count (up to 4 more qubits) than what is possible on a PC due to the RAM requirements. This work provides the quantum research and development community with a comprehensive analysis of the behavior of the IQS on two distinct systems.
Quantum circuit simulation at scale demands high-performance computing (HPC) frameworks capable of distributing exponentially growing state vectors and tensor networks across heterogeneous compute clusters. As quantum algorithm development accelerates and circuits approach 50-100 qubits in practical workloads, simulation bottlenecks shift from single-node memory constraints to inter-node communication overhead, GPU memory bandwidth, and framework-level scheduling inefficiencies. This paper proposes the HPC Quantum Simulation Framework Benchmark (HQSFB), a systematic evaluation of five leading quantum simulation frameworks -- Qiskit Aer, Cirq on GCP, cuQuantum (NVIDIA), QuEST, and Intel Quantum Simulator (IQS) -- across six HPC deployment configurations spanning single-GPU workstations to 512-GPU supercomputer partitions. HQSFB introduces the Framework Efficiency Score (FES) combining simulation throughput, GPU utilisation, inter-node communication overhead, and memory scaling efficiency. Key results: cuQuantum achieves the highest FES (0.924) with 94.2% GPU utilisation and 42x speedup over CPU baseline at 512 GPUs; QuEST achieves the best memory scaling efficiency (0.962) for distributed statevector simulation; Qiskit Aer provides the broadest circuit compatibility with FES = 0.842. The framework provides HPC configuration guidance and an open benchmark suite for quantum simulation infrastructure planning.
The rapid expansion of quantum computing research has created a growing need for effective and scalable tools to simulate quantum algorithms. In this study, we present a performance analysis of several quantum circuit simulators by using the Deutsch-Jozsa (DJ) and Quantum Fourier Transform (QFT). A gate-based QASM implementation serves as the baseline and is converted to code compatible with each simulator. Our evaluation covers multi-CPU simulators like Qiskit, Qsim-Cirq, and QuEST, as well as their GPU-accelerated variants along with CUDA-Q, for qubit sizes ranging from 21 to 35. By profiling these algorithms, we compare key performance indicators and reveal notable efficiency differences between platforms. In particular, the multi-node version of QuEST shows strong CPU utilization, high speedup, and efficient memory scalability. whereas GPUbased implementations provide clear performance advantages at higher qubit counts. These findings offer practical guidance for choosing simulation platforms according to problem size and available computing resources, thereby supporting more efficient quantum-algorithm workflows.
As quantum circuits grow in complexity, traditional simulation methods face significant challenges, particularly regarding memory usage and computational time. This paper investigates the performance of decision diagram-based quantum circuit simulations when scaled across high-performance computing (HPC) environments. Specifically, we benchmark a multi-core implementation of the Quantum Multi-Valued Decision Diagram (QMDD) circuit simulator using the COARE HPC facility at the Department of Science and Technology-Advanced Science and Technology Institute. Our results demonstrate that leveraging decision diagrams in a multi-core setup enhances simulation scalability and efficiency in several circuits, although not all, compared to single-core implementations and other classical simulation techniques, such as Qiskit Aer and Munich Quantum Toolkit’s DDSim. This work provides valuable insights into the practical scalability of quantum circuit simulators and suggests potential directions for future advancements in quantum computing simulation technologies.
Abstract Classical simulation of quantum computers will continue to play an essential role in the progress of quantum information science, both for numerical studies of quantum algorithms and for modeling noise and errors. Here we introduce the latest release of Intel Quantum Simulator (IQS), formerly known as qHiPSTER. The high-performance computing (HPC) capability of the software allows users to leverage the available hardware resources provided by supercomputers, as well as available public cloud computing infrastructure. To take advantage of the latter platform, together with the distributed simulation of each separate quantum state, IQS allows to subdivide the computational resources to simulate a pool of related circuits in parallel. We highlight the technical implementation of the distributed algorithm and details about the new pool functionality. We also include some basic benchmarks (up to 42 qubits) and performance results obtained using HPC infrastructure. Finally, we use IQS to emulate a scenario in which many quantum devices are running in parallel to implement the quantum approximate optimization algorithm, using particle swarm optimization as the classical subroutine. The results demonstrate that the hyperparameters of this classical optimization algorithm depends on the total number of quantum circuit simulations one has the bandwidth to perform. Intel Quantum Simulator has been released open-source with permissive licensing and is designed to simulate a large number of qubits, to emulate multiple quantum devices running in parallel, and/or to study the effects of decoherence and other hardware errors on calculation results.
Hybrid quantum-high performance computing (Q-HPC) workflows are emerging as a key strategy for running quantum applications at scale in current noisy intermediate-scale quantum (NISQ) devices. These workflows must operate seamlessly across diverse simulators and hardware backends since no single simulator offers the best performance for every circuit type. Simulation efficiency depends strongly on circuit structure, entanglement, and depth, making a flexible and backend-agnostic execution model essential for fair benchmarking, informed platform selection, and ultimately the identification of quantum advantage opportunities. In this work, we extend the Quantum Framework (QFw), a modular and HPC-aware orchestration layer, to integrate multiple local backends (Qiskit Aer, NWQ-Sim, QTensor, and TN-QVM) and a cloud-based quantum backend (IonQ) under a unified interface. Using this integration, we execute a number of non-variational as well as variational workloads. The results highlight workload-specific backend advantages: while Qiskit Aer’s matrix product state excels for large Ising models, NWQ-Sim not only leads on large-scale entanglement and Hamiltonian but also shows the benefits of concurrent subproblem execution in a distributed manner for optimization problems. These findings demonstrate that simulator-agnostic, HPC-aware orchestration is a practical path toward scalable, reproducible, and portable Q-HPC ecosystems, thereby accelerating progress toward demonstrating quantum advantage.