Study on Configuration of Single-Flux-Quantum Circuits for Increasing Throughput

一起 長岡, Ikki Nagaoka

Ryota Kashima, Ikki Nagaoka, Tomoki Nakano +3 more

Yoshihito Hashimoto, Shinichi Yorozu, T. Satoh +1 more

We report a demonstration of single-flux-quantum (SFQ) pulse transmission between superconductor chips at throughputs beyond 100 Gbps. A fabrication process with a high junction critical current density of 10kA∕cm2 was used to increase the operation speed of a pulse driver and receiver. The chips were flip-chip bonded on a passive microstrip carrier using small solder bumps with diameters of 30μm. With experiments based on a ring-shaped circuit, chip-to-chip SFQ pulse transmission has been demonstrated up to 117 Gbps with an error rate of less than 10−15. The power dissipated by the driver and receiver was only 0.24μW at 117 Gbps.

N Mori, A. Akahori, Tomoyuki Sato +3 more

Masamitsu Tanaka, Yuki Yamanashi, Yoshiaki Kamiya +7 more

We propose a new design approach for high- throughput arithmetic circuits based on state transitions using single-flux-quantum (SFQ) logic circuits. Microprocessors have several complex interconnects in datapath including loops of data, to which only one SFQ pulse is allowed to be confined, and the loops can spoil the high-throughput nature of SFQ circuits. In our new approach, we regard an arithmetic circuit with loops as a sequential logic circuit, and we use nondestructive readout gates (NDROs) as storage elements of the internal state. We can eliminate the loops and achieve high throughput by translating calculations into transitions of the state stored in the NDROs. We have implemented a bit-serial adder with the proposed approach, and demonstrated 36-GHz operations using the niobium 2.5-kA/cm2standard process technology.

Akira Fujimaki, Takahiro Yamada, Masamitsu Tanaka +4 more