This paper presents a noise-scaled simulation study to characterize whether increased QAOA circuit depth provides measurable improvement for fault tree QUBO instances under varying two-qubit gate fidelity conditions. Using 60 fault tree instances with circuits loaded via QPY serialization, we executed 960 simulations spanning depths p = 1 and p = 2 across a fidelity sweep from F₂ = 0.900 to F₂ = 0.992, with fixed single-qubit fidelity F₁ = 0.9995 and readout fidelity Fro = 0.97. The primary finding is that output distributions are noise-dominated and shot-limited at all tested fidelity levels. Maximum probability values cluster near the shot floor of 1/1024, and Shannon entropy approaches the measurement ceiling of 10 bits. The median difference between depth p = 2 and depth p = 1 is exactly zero for maximum probability at all fidelity levels. No consistent improvement in distribution concentration is observed as fidelity increases within the tested range. These results establish that no depth benefit is detectable through F₂ = 0.992 under this noise model and shot budget. Practitioners should not expect depth scaling to improve output quality until gate fidelity exceeds the upper bound of this sweep. This completes the investigation arc from prior work: depth does not help on current hardware because noise accumulation exceeds algorithmic signal, and this finding persists through the tested fidelity range.
This paper presents a noise-scaled simulation study to characterize whether increased QAOA circuit depth provides measurable improvement for fault tree QUBO instances under varying two-qubit gate fidelity conditions. Using 60 fault tree instances with circuits loaded via QPY serialization, we executed 960 simulations spanning depths p = 1 and p = 2 across a fidelity sweep from F₂ = 0.900 to F₂ = 0.992, with fixed single-qubit fidelity F₁ = 0.9995 and readout fidelity Fro = 0.97. The primary finding is that output distributions are noise-dominated and shot-limited at all tested fidelity levels. Maximum probability values cluster near the shot floor of 1/1024, and Shannon entropy approaches the measurement ceiling of 10 bits. The median difference between depth p = 2 and depth p = 1 is exactly zero for maximum probability at all fidelity levels. No consistent improvement in distribution concentration is observed as fidelity increases within the tested range. These results establish that no depth benefit is detectable through F₂ = 0.992 under this noise model and shot budget. Practitioners should not expect depth scaling to improve output quality until gate fidelity exceeds the upper bound of this sweep. This completes the investigation arc from prior work: depth does not help on current hardware because noise accumulation exceeds algorithmic signal, and this finding persists through the tested fidelity range.
This paper analyzes why increased QAOA circuit depth does not improve sampling outcomes on contemporary superconducting hardware. Using a fixed experimental corpus of 60 fault tree QUBO instances spanning problem sizes N = 12, 16, 20, 24, 28, and 32, we evaluate ibm_torino executions at depths p = 1 and p = 2 with 8,192 shots per circuit, for 120 circuit publications total. We connect canonical distribution metrics from the companion limits study—including maximum probability, Shannon entropy, and top-10 mass—to circuit-level indicators derived from archived circuit renderings. Across all problem sizes, increasing depth from p = 1 to p = 2 does not yield consistent concentration gains. The median improvement is exactly zero for all three metrics; mean changes are three orders of magnitude below the shot-noise scale. Entropy remains close to the theoretical maximum of log₂(8192) ≈ 13 bits, indicating noise-dominated operation. Circuit-level analysis reveals that all 10 circuits within each job share identical structure, with no depth-dependent structural diversification observed. These results support a mechanism-level interpretation: additional depth increases circuit exposure to hardware noise without producing usable structure in the sampled distribution under the studied compilation and device conditions. This paper provides audit-ready tables and figures linking depth study outcomes to circuit-level characteristics while keeping claims strictly within empirical behavior for this backend, circuit family, and execution configuration.
The Quantum Approximate Optimization Algorithm (QAOA) is a leading candidate for near-term quantum advantage in combinatorial optimization. A central design parameter is circuit depth p, with theoretical analyses establishing asymptotic convergence under idealized conditions. This paper presents a limits study demonstrating that this theoretical relationship does not translate to measurable improvement on current noisy intermediate-scale quantum (NISQ) hardware for fault tree analysis applications. Across 120 QAOA executions on 60 QUBO-encoded fault tree instances (N ∈ {12, 16, 20, 24, 28, 32}) on IBM Quantum hardware (ibm_torino, 133-qubit Heron processor), circuit depths p = 1 and p = 2 were directly compared. The mean change in optimal state sampling probability from doubling circuit depth was Δmax_prob = 1.22 × 10⁻⁵ with a median Δ of zero. For 8,192 shots, the binomial sampling uncertainty is O(10⁻²); the observed mean delta is therefore approximately three orders of magnitude below the shot-noise scale, making the difference statistically indistinguishable from zero. Output distribution entropy approaches the theoretical maximum of log₂(8192) ≈ 13 bits, indicating hardware noise dominates algorithmic signal. These findings establish that for fault tree minimal cut set identification on current NISQ devices, computational resources are more effectively allocated to increased shot counts than to circuit depth. Complete experimental artifacts with SHA-256 verification are provided, enabling full reproducibility.
The Quantum Approximate Optimization Algorithm (QAOA) is a leading candidate for near-term quantum advantage in combinatorial optimization. A central design parameter is circuit depth p, with theoretical analyses suggesting higher p monotonically improves solution quality. This paper presents empirical evidence that this theoretical relationship does not hold on current noisy intermediate-scale quantum (NISQ) hardware for fault tree analysis applications. Across 120 QAOA executions on 60 QUBO-encoded fault tree instances (N ∈ {12, 16, 20, 24, 28, 32}) on IBM quantum hardware, circuit depths p = 1 and p = 2 were directly compared. The mean change in optimal state sampling probability from doubling circuit depth was Δmax_prob = 1.22 × 10⁻⁵ with a median Δ of zero, making the difference statistically indistinguishable from noise across all evaluated metrics. Output distribution entropy approaches the theoretical maximum (mean = 12.74 bits), indicating hardware noise dominates algorithmic signal. These findings establish that for fault tree minimal cut set identification on current NISQ devices, computational resources are more effectively allocated to increased shot counts than to circuit depth. Complete experimental artifacts with SHA-256 verification are provided, enabling full reproducibility.
This work evaluates Constraint-Level QUBO (CL-QUBO) circuit execution on IBM Quantum hardware for 34 reactor-scale fault tree subtrees spanning 5–8 basic events, selected from the 776-member quantum-feasible candidate pool established in Paper 9 (Peters, 2026). Circuits were constructed using the CL-QUBO encoding and QAOA Alternating Operator Ansatz at depth p = 1, transpiled to both ibm_torino (133 qubits) and ibm_marrakesh (156 qubits), and executed under three IBM Runtime Sampler configurations (RL0, RL1, RL2) with identical bound parameters (β = 0.2, γ = 0.2) across all resilience levels. A total of six hardware jobs consumed 476 seconds (7.93 minutes) of quantum runtime across 8,192 shots per circuit. The results demonstrate that at this circuit scale, 10–16 logical qubits transpiling to 78–150 two-qubit gates at depths of 165–338, hardware output distributions are overwhelmingly noise-dominated by standard distributional metrics. Neither RL1 nor RL2 produces improvement; RL1 actively degrades output quality relative to RL0 on both backends. However, direct comparison of hardware top-probability outcomes against SCRAM-validated prime implicants from Paper 9 reveals substantial above-random minimal cut set (MCS) enrichment relative to the uniform-random baseline in the n = 8 groups (6.2× and 3.8× expected random rate in the top-200 outcomes), demonstrating that CL-QUBO circuits produce detectable MCS-correlated structure even in distributions that appear noise-dominated by aggregate metrics. These findings characterize the current observed performance ceiling for this CL-QUBO configuration on the tested IBM backends and provide both distributional and MCS-correctness baselines against which future hardware improvements can be measured.
The practical utility of Noisy Intermediate-Scale Quantum (NISQ) processors depends critically on their performance under demanding computational loads. We investigated the impact of circuit depth on the 127-qubit superconducting processor ibm_brisbane by executing stress-test circuits utilizing all available qubits. These circuits consisted of repeated layers combining random single-qubit rotations and linear chains of Controlled-Z entangling gates. We systematically increased the ideal circuit depth from 1 up to 30 layers, resulting in transpiled circuits ranging from approximately 550 to over 15,000 gates (optimization level 2). Using the qiskit-ibm-runtime Sampler primitive with 4096 shots and default error mitigation, we successfully obtained results for ideal depths up to 22 (transpiled depth ~11.7k gates), beyond which platform usage limits prevented execution. Our central finding is the immediate onset of noise saturation: the output distribution reached maximum sample entropy (12.0 bits) and exhibited near-zero average single-qubit Z magnetization even at the shallowest depth tested (ideal depth 1, transpiled depth ~550). These noise-dominated characteristics persisted despite significant increases in transpiled circuit depth. This demonstrates that for these specific full-width, complex random circuits, noise overwhelms the computation almost instantaneously on this device under default settings, highlighting the profound challenge of achieving computational fidelity for deep, wide algorithms in the NISQ era without advanced error handling.
Abstract The practical utility of Noisy Intermediate-Scale Quantum (NISQ) processors depends critically on their performance under demanding computational loads. We investigated the impact of circuit depth on the 127-qubit superconducting processor ibm_brisbane by executing stress-test circuits utilizing all available qubits. These circuits consisted of repeated layers combining random single-qubit rotations and linear chains of Controlled-Z entangling gates. We systematically increased the ideal circuit depth from 1 up to 30 layers, resulting in transpiled circuits ranging from approximately 550 to over 15,000 gates (optimization level 2). Using the qiskit-ibm-runtime Sampler primitive with 4096 shots and default error mitigation, we successfully obtained results for ideal depths up to 22 (transpiled depth ~ 11.7k gates), beyond which platform usage limits prevented execution. Our central finding is the immediate onset of noise saturation: the output distribution reached maximum sample entropy (12.0 bits) and exhibited near-zero average single-qubit Z magnetization even at the shallowest depth tested (ideal depth 1, transpiled depth ~ 550). These noise-dominated characteristics persisted despite significant increases in transpiled circuit depth. This demonstrates that for these specific full-width, complex random circuits, noise overwhelms the computation almost instantaneously on this device under default settings, highlighting the profound challenge of achieving computational fidelity for deep, wide algorithms in the NISQ era without advanced error handling.