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Parallellization of the LDPC decoding algorithm MSA, using CUDA for NVIDIA GPUs

Lindbom, David, Pettersson, Jonathan

Published Jan 1, 2023• 0 citations
OpenAlex

Abstract

Inom dagens samhälle är de flesta mobilenheter uppkopplade till en basstation. Mycket information förväntas kunna överföras från telefonen till basstationen utan några störningar för användaren. Detta kan underlättas genom att använda en bitfelskorrigerare exempelvis Min Sum Algoritmen (MSA), för att avkoda Low-Density Parity-Check (LDPC) koder. Algoritmen fungerar genom att utföra fyra moment: initialisering, radoperation, kolumnoperation och beslutsoperation. Istället för att utföra momenten på en Central Processing Unit (CPU), effektiviseras processen genom att utnyttja Graphics Processing Units (GPU) möjlighet till parallellisering. Optimeringen för detta sker genom Compute Unified Device Architecture (CUDA). Resultatet visar på en effektivisering på 89% vad gäller exekveringstid för bitfelskorrigering genom att använda GPU:er istället för CPU:er.

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Inom dagens samhälle är de flesta mobilenheter uppkopplade till en basstation. Mycket information förväntas kunna överföras från telefonen till basstationen utan några störningar för användaren. Detta kan underlättas genom att använda en bitfelskorrigerare exempelvis Min Sum Algoritmen (MSA), för att avkoda Low-Density Parity-Check (LDPC) koder. Algoritmen fungerar genom att utföra fyra moment: initialisering, radoperation, kolumnoperation och beslutsoperation. Istället för att utföra momenten på en Central Processing Unit (CPU), effektiviseras processen genom att utnyttja Graphics Processing Units (GPU) möjlighet till parallellisering. Optimeringen för detta sker genom Compute Unified Device Architecture (CUDA). Resultatet visar på en effektivisering på 89% vad gäller exekveringstid för bitfelskorrigering genom att använda GPU:er istället för CPU:er.
Low-Density Parity-Check (LDPC) codes are linear error-correcting codes used to establish reliable communication between units on a noisy transmission channel in mobile telecommunications. LDPC algorithms detect and recover altered or corrupted message bits using sparse parity-check matrices in order to decipher messages correctly. LDPC codes have been shown to be fitting coding schemes for the fifth generation (5G) New Radio (NR), according to the third generation partnership project (3GPP). TietoEvry, a consultant in telecom, has discovered that optimizations of LDPC decoding algorithms can be achieved/obtained with the use of a parallel computing platform called Compute Unified Device Architecture (CUDA), developed by NVIDIA. This platform utilizes the capabilities of a graphics processing unit (GPU) rather than a central processing unit (CPU), which in turn provides parallel computing. An optimized version of an LDPC decoding algorithm, the Min-Sum Algorithm (MSA), is implemented in CUDA and in C++ for comparison in terms of CPU execution time, to explore the capabilities that CUDA offers. The testing is done with a set of 12 sparse parity-check matrices and input-channel messages with different sizes. As a result, the CUDA implementation executes approximately 55% faster than a standard, unoptimized C++ implementation.
Over the last ten years, there has been an incremental growth of mobile network data traffic. The evolution leading to the development of 5G stands as a testament to the increased demands for high speed networks. Channel coding plays a pivotal role in 5G networks, making it possible to recover messages from errors introduced when sent through the network. Channel decoding is however a time consuming task for a receiver, and making optimization to this process could therefore have a significant impact on receiver processing time. Low-Density Parity-Check (LDPC) codes are one of the channel coding schemes used in the 5G standard. These codes could benefit from parallel processing, making Graphics Processing Units (GPUs) with their parallel computation abilities a possible platform for effective LDPC decoding. In this thesis, our goal is to evaluate a GPU as a platform for 5G LDPC decoding. The LDPC codes adhering to the 5G standard belong to the Quasi-Cyclic LDPC (QC-LDPC) subclass. Optimizations targeting this subclass, as well as other optimization techniques, are implemented in our thesis project to promote fast execution times. A GPU-based decoder is evaluated against a Central Processing Unit (CPU)-based decoder, written with Compute Unified Device Architecture (CUDA) and C++ respectively. The functionally equivalent decoders implement the layered offset Min-Sum Algorithm (MSA) with early termination to decode messages. Execution time for the decoders were measured while varying message size, Signal-to-Noise Ratio (SNR) and maximum iterations. Additionaly, we evaluated the decoders with and without including early termination, and also evaluated the GPU-decoder when it was integrated into a MATLAB 5G channel simulator used by Tietoevry. The results from the experiments showed that the GPU-based decoder experienced up to 4.3 times faster execution than the CPU-based decoder for message sizes ranging from 3000-12000 bits. The GPU-based decoder however experienced a higher baseline execution time, making the CPU-based decoder faster for smaller message sizes. It was also concluded that the benefit of including early termination in the decoder generally outweighs the cost of additional processing time.
Simulering av kvantdatorer har en hög minnesanvändning och ofta långa exekveringstider. Av den anledningen var syftet med detta projektet att analysera ifall datakomprimering och GPU-acceleration kan användas för att köra simuleringar med fler qubits än vad som var tidigare möjligt. Detta projekt belyser hur GPUacceleration och komprimeringsalgoritmerna, ZFP och FPZIP, påverkar mängden qubits som kan simuleras. Simulatorn som testades i projektet var en modifierad version av Quantum Exact Simulation Toolkit (QuEST). Resultatet av projektet påvisade att datakomprimering visar en god potential för att minska den totala minnesanvändningen per qubit. Användningen av datakomprimering påverkade dock exekveringstiden negativt, men genom att använda GPU-acceleration minskades effekterna.
Low-Density Parity-Check (LDPC) codes are powerful error correcting codes. LDPC decoders have been implemented as efficient error correction codes on dedicated VLSI hardware architectures in recent years. This paper describes two strategies to parallelize min-sum decoding of irregular LDPC codes. The first implements min-sum LDPC decoders on multicore platforms using OpenMP, while the other uses the Compute Unified Device Architecture (CUDA) to parallelize LDPC decoding on Graphics Processing Units (GPUs). Empirical studies on data with various scales show that the performance of these decoding processes is improved by these parallel strategies and the GPUs provide more efficient, fast implementation decoder.
Digital mobile communication technologies, such as next generation mobile communication and mobile TV, are rapidly advancing. Hardware designs to provide baseband processing of new protocol standards are being actively attempted, because of concurrently emerging multiple standards and diverse needs on device functions, hardware-only implementation may have reached a limit. To overcome this challenge, digital communication system designs are adopting software solutions that use central processing units or graphics processing units (GPUs) to implement communication protocols. In this article we propose a parallel software implementation of low density parity check decoding algorithms, and we use a multi-core processor and a GPU to achieve both flexibility and high performance. Specifically, we use OpenMP for parallelizing software on a multi-core processor and Compute Unified Device Architecture (CUDA) for parallel software running on a GPU. We process information on H-matrices using OpenMP pragmas on a multi-core processor and execute decoding algorithms in parallel using CUDA on a GPU. We evaluated the performance of the proposed implementation with respect to two different code rates for the China Multimedia Mobile Broadcasting (CMMB) standard, and we verified that the proposed implementation satisfies the CMMB bandwidth requirement.
In this paper, the Sum Product Algorithm (SPA) and the Min-Sum Algorithm (MSA) are used for decoding low-density parity-check convolutional codes (LDPC-CCs). The two algorithms have been implemented and run on three different computing environments. The first environment is a single-threading Central Processing Unit (CPU); the second one is the multi-threading CPU based on OpenMP (Open Multi-Processing); and the third one is the multi-threading Graphics Processing Unit (GPU). The error performance of the LDPC-CCs and the simulation time taken under the three specific computing environments and the two decoding algorithms are evaluated and compared. It is found that the different computing environments produce very similar error results. It is also concluded that using the GPU computing platform can reduce the simulation time substantially.