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IEEE Transactions on Circuits and Systems I Regular Papers

Closed-Loop CBRAM Crossbar System Toward Hardware Acceleration of Quantum Algorithms

Iosif-Angelos Fyrigos, Theodoros Panagiotis Chatzinikolaou, Konstantinos Rallis, Vasileios G. Ntinas, Panagiotis Bousoulas, D. Tsoukalas, Panagiotis Dimitrakis, Yue Zhang, Georgios Ch. Sirakoulis

Published Nov 5, 2025• 0 citations
Publisher

Abstract

Quantum computing is a compelling new technology that is becoming increasingly practical as time progresses. Quantum computers have the potential to solve problems of great complexity and magnitude across many different industries, utilizing appropriate quantum algorithms. Given the evolving stage of quantum computing, characterized by a limited number of operational quantum computers that demand extensive cooling, face decoherence issues, and incur significant fabrication costs, there exists a pronounced need for quantum computer simulators. In this work, a reconfigurable closed-loop CBRAM crossbar system has been developed for the execution and acceleration of quantum algorithm simulation, leveraging analog in-memory computing. The circuit supports a universal set of quantum gates representation, and through its reprogramming capabilities and feedback loop, can compute any quantum algorithm. To demonstrate its functionality, the 3-qubit Grover algorithm is executed on the proposed circuit. Building on the extensive circuit simulation, a comparative analysis of power and speed between the proposed nanoelectronic circuit and conventional hardware has been conducted, demonstrating the high efficiency and performance gains, followed by a scalability analysis. Furthermore, a framework has been developed that supports the design of custom closed-loop memristive crossbars through a graphical user interface (GUI), providing the user with the capability to execute quantum algorithms and examine the programming and computations of the circuit, assisting with the realization of a hardware prototype.

DOI
10.1109/tcsi.2025.3623906

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Quantum computing is a compelling new technology that is becoming increasingly practical as time progresses. Quantum computers have the potential to solve problems of great complexity and magnitude across many different industries, utilizing appropriate quantum algorithms. Given the evolving stage of quantum computing, characterized by a limited number of operational quantum computers that demand extensive cooling, face decoherence issues, and incur significant fabrication costs, there exists a pronounced need for quantum computer simulators. In this work, a reconfigurable closed-loop CBRAM crossbar system has been developed for the execution and acceleration of quantum algorithm simulation, leveraging analog in-memory computing. The circuit supports a universal set of quantum gates representation, and through its reprogramming capabilities and feedback loop, can compute any quantum algorithm. To demonstrate its functionality, the 3-qubit Grover algorithm is executed on the proposed circuit. Building on the extensive circuit simulation, a comparative analysis of power and speed between the proposed nanoelectronic circuit and conventional hardware has been conducted, demonstrating the high efficiency and performance gains, followed by a scalability analysis. Furthermore, a framework has been developed that supports the design of custom closed-loop memristive crossbars through a graphical user interface (GUI), providing the user with the capability to execute quantum algorithms and examine the programming and computations of the circuit, assisting with the realization of a hardware prototype.
Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incorporates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.
There is a growing interest in quantum computers and quantum algorithm development. It has been proved that ideal quantum computers, with zero error rates and large decoherence times, can solve problems that are intractable for today’s classical computers. Quantum computers use two resources, superposition and entanglement, that have no classical analog. Since quantum computer platforms that are currently available comprise only a few dozen of qubits, the use of quantum simulators is essential in developing and testing new quantum algorithms. We present a novel quantum simulator based on memristor crossbar circuits and use them to simulate well-known quantum algorithms, namely the Deutsch and Grover quantum algorithms. In quantum computing the dominant algebraic operations are matrix-vector multiplications. The execution time grows exponentially with the simulated number of qubits, causing an exponential slowdown in quantum algorithm execution using classical computers. In this work, we show that the inherent characteristics of memristor arrays can be used to overcome this problem and that memristor arrays can be used not only as independent quantum simulators but also as a part of a quantum computer stack where classical computers accelerators are connected. Our memristive crossbar circuits are re-configurable and can be programmed to simulate any quantum algorithm.
Quantum computing and quantum computers are a major part of the second quantum revolution. Existing quantum algorithms can natively solve complex problems, such as the prime number factorization and searching of unstructured databases, in a fast and efficient way. The main obstacle towards building large and efficient quantum computers is decoherence, which produces errors that have to be continuously corrected using quantum error correcting codes. Beyond the realisation of quantum computing systems with actual quantum hardware, quantum algorithms have been developed based on quantum logic gates that can be described and utilised by classical computers and proper interfaces based on linear algebra operations. Furthermore, memristive grids have been proposed as novel nanoscale and low-power hardware accelerators for the time-consuming matrix-vector multiplication and tensor products. In this work, given that for quantum computations simulation, the matrix-vector multiplication is the dominant algebraic operation, we utilize the unprecedented characteristics of memristive grids to implement circuit-level quantum computations. Since all quantum computations can be mapped to quantum circuits, memristive grids can also be used as efficient quantum simulators, as classical/quantum interfaces and also as accelerators in mixed classical-quantum computing systems.
This paper proposes a novel approach to quantum algorithm optimization through dynamically reconfigurable quantum circuits. The core concept involves adapting the structure of a quantum circuit during its execution, responding to real-time feedback derived from quantum state analysis. Traditional quantum circuit design often relies on static, pre-defined architectures, limiting their adaptability and potential for optimization. This work introduces a control system capable of monitoring qubit states and dynamically altering circuit topology – specifically, adjusting gate sequences and potentially even adding or removing qubits – to minimize gate count and maximize coherence, thereby improving overall algorithm efficiency. The theoretical framework presented here outlines the key components and operational principles of such a system, highlighting its potential to overcome the limitations of static circuits and usher in a new era of adaptive quantum computation. We demonstrate, through a mathematical model, how this dynamic reconfiguration can be strategically implemented to address specific algorithmic challenges, focusing on reducing circuit complexity and enhancing the fidelity of quantum computations. The key to this approach lies in continuous feedback loops and a sophisticated control algorithm that leverages quantum state information to guide circuit modifications. This allows for a more tailored and efficient execution of quantum algorithms compared to static designs.
This paper investigates the design and implementation of dynamically reconfigurable quantum circuits, a crucial step towards realizing truly adaptive quantum computation. The core concept involves utilizing programmable quantum hardware alongside machine learning techniques to monitor and respond to the evolving demands of a quantum algorithm during its execution. Traditional quantum circuit design typically relies on static topologies, leading to inefficiencies and limitations in handling unforeseen complexities or errors. This work proposes a system where circuit topology – specifically gate selection and qubit routing – is adjusted in real-time based on predictive analysis of computational bottlenecks. The primary mechanism leverages machine learning models trained to identify performance bottlenecks and subsequently trigger reconfiguration. This dynamic adaptation allows for optimized resource utilization, enhanced error correction capabilities, and ultimately, the potential for achieving superior performance compared to pre-designed, static circuits. The presented framework represents a significant departure from conventional quantum circuit design, paving the way for algorithms that can intrinsically adapt to their environment, significantly improving the prospects for practical quantum computation.
Quantum computers are regarded as the future of computing, as they are believed to be capable of solving extremely complex problems that are intractable on conventional digital computers. However, near-term quantum computers are prone to a plethora of noise sources that are difficult to mitigate, possibly limiting their scalability and precluding us from running any useful algorithms. Quantum emulation is an alternative approach that uses classical analog hardware to emulate the properties of superposition and entanglement, thereby mimicking quantum parallelism to attain similar speeds. By contrast, the use of classical digital hardware, such as field programmable gate arrays (FPGA), is less inefficient at emulating a quantum computer, as it does not take advantage of the fundamentally analog nature of quantum states. Consequently, this approach adds an inherent hardware overhead that also prevents scaling. In this work, an energy-efficient quantum emulator based on analog circuits realized in UMC 180-nm CMOS technology is proposed along with the design methodologies for a scalable computing architecture. A six-fold improvement in power consumption was observed over the FPGA-based approach for a ten-qubit emulation of Grover's search algorithm. The proposed emulator is also about 400 times faster than a Ryzen 5600x six-core processor performing a simulation of six-qubit Grover's search algorithm