In this work, we aim to address the computational overhead challenge in quantum optimal control while reducing circuit latency. We propose a novel approach combining ZX-Calculus, circuit partitioning, and circuit synthesis for pulse generation. By implementing finer granularity in pulse generation and exploring equivalent circuit representations, we achieve increased parallelism and decreased latency. Our method demonstrates a 31.74% reduction in latency compared to previous work and a 76.80% reduction compared to gate-based pulse generation methods, while minimizing computational overhead.
In this work, we aim to address the computational overhead challenge in quantum optimal control while reducing circuit latency. We propose a novel approach combining ZX-Calculus, circuit partitioning, and circuit synthesis for pulse generation. By implementing finer granularity in pulse generation and exploring equivalent circuit representations, we achieve increased parallelism and decreased latency. Our method demonstrates a 31.74% reduction in latency compared to previous work and a 76.80% reduction compared to gate-based pulse generation methods, while minimizing computational overhead.
In this paper we propose EPOC, an efficient pulse generation framework for quantum circuits that combines ZX-Calculus, circuit partitioning, and circuit synthesis to accelerate pulse generation. Unlike previous works that focus on generating pulses from unitary matrices without exploring equivalent representations, EPOC employs a finer granularity approach by grouping quantum gates and decomposing the resulting unitary matrices into smaller ones using synthesis techniques. This enables increased parallelism and decreased latency in quantum pulses. EPOC also continuously optimizes the circuit by identifying equivalent representations, leading to further reductions in circuit latency while minimizing the computational overhead associated with quantum optimal control. We introduce circuit synthesis into the workflow of quantum optimal control for the first time and achieve a 31.74% reduction in latency compared to previous work and a 76.80% reduction compared to the gate-based method for creating pulses. The approach demonstrates the potential for significant performance improvements in quantum circuits while minimizing computational overhead.
In the last decades, we have witnessed the rapid growth of Quantum Computing. In the current Noisy Intermediate-Scale Quantum (NISQ) era, the capability of a quantum machine is limited by the decoherence time, gate fidelity and the number of Qubits. Current quantum computing applications are far from the real “quantum supremacy” due to the fragile physical Qubits, which can only be entangled for a few microseconds. Recent works use quantum optimal control to reduce the latency of quantum circuits, thereby effectively increasing quantum volume. However, the key challenge of this technique is the large overhead due to long compilation time. In this paper, we propose AccQOC, a comprehensive static/dynamic hybrid workflow to transform gate groups (equivalent to matrices) to pulses using QOC (Quantum Optimal Control) with a reasonable compilation time budget. AccQOC is composed of static pre-compilation and accelerated dynamic compilation. After the quantum program is mapped to the quantum circuit with our heuristic mapping algorithm considering crosstalk, we leverage static pre-compilation to generate pulses for the frequently used groups to eliminate the dynamic compilation time for them. The pulse is generated using QOC with binary search to determine the latency. For a new program, we use the same policy to generate groups, thus avoid incurring overhead for the “covered” groups. The dynamic compilation deals with “un-covered” groups with accelerated pulse generation. The key insight is that the pulse of a group can be generated faster based on the generated pulse of a similar group. We propose to reduce the compilation time by generating an ordered sequence of groups in which the sum of similarity among consecutive groups in the sequence is minimized. We can find the sequence by constructing a similarity graph - a complete graph in which each vertex is a gate group and the weight of an edge is the similarity between the two groups it connects, then construct a Minimum Spanning Tree (MST) for SG. With the methodology of AccQOC, we reached a balanced point of compilation time and overall latency. The results show that accelerated compilation based on MST achieves 9.88× compilation speedup compared to the standard compilation of each group while maintaining an average 2.43× latency reduction compared with gate-based compilation.
Quantum computing has garnered attention for its potential to solve complex computational problems considerably more rapidly than classical computing. Despite notable advancements in the field, achieving meaningful scalability and noise control in quantum hardware remains challenging. Incoherent errors caused by decoherence restrict the total computation time, often making it very short. While hardware advancements continue to progress, quantum software specialists seek to minimize quantum circuit latency to mitigate dissipation; however, at the pulse level, fast quantum gates often lead to leakage, leaving minimal room for further optimization. Recent advancements have demonstrated the effectiveness of quantum control techniques in generating quantum gates that are robust to coherent error sources. Nevertheless, these techniques come with a trade-off---extended gate durations. In this paper, we introduce an alternative approach to pulse scheduling that enables the use of both fast and robust quantum gates within the same quantum circuit. The time-optimization framework models the quantum circuit as a dependency graph, implements the fastest quantum gates on the critical path, and uses idle periods outside the critical path to optimally implement longer, more robust gates from the gate set, without increasing latency. Experiments conducted on IBMQ Brisbane show that this approach improves the absolute success probability of quantum circuit execution by more than 25%, with performance gains scaling as the number of qubits increases.
Near-term intermediate-scale quantum (NISQ) devices are subject to considerable noise and short coherence time. Consequently, it is critical to minimize circuit execution latency and improve fidelity. Traditionally, each basis gate of a transpiled circuit is decoded into a fixed episode of the device control pulses. Recent studies investigate the merged pulse generation method for customized gates through quantum optimal control (QOC). In this work, we propose PAQOC, a novel QOC framework that can (i) exploit an augmented program-aware (APA) basis gate set for the tradeoff between compilation time and circuit performance, (ii) prune the search space based on a criticality-centric analytical model and experiment observations we learned from 150 benchmarks. Evaluations using seventeen applications show that PAQOC can achieve an average 54% reduction of the circuit latency, on average 43% reduction in compilation overhead, and a 1.27× improvement in fidelity. PAQOC is available on GitHub1.
Quantum Optimal Control (QOC) frameworks are powerful tools for compiling quantum circuits into low-latency hardware control pulses, but recent studies suffer from two critical limitations: lengthy compilation times and potential logical inconsistencies from flawed gate grouping strategies. In this work, we introduce d'ArQ, a novel QOC framework that solves these challenges. (i) We identify and resolve the causality problem, a flaw in greedy partitioning that can produce invalid schedules, by introducing a DAG-based grouping algorithm with assigning mergeability to each group so that it guarantees logical correctness. (ii) To mitigate compilation times, we use a pre-computed library of pulses derived from random unitary matrices to provide a high-quality random initialization for pulse optimization. (iii) Diverging from prior work based on GRAPE, d'ArQ is built on the GOAT algorithm. We demonstrate that the choice of analytic basis is a critical hyperparameter and introduce a heuristic cost model to dynamically select the optimal basis for each synthesis task, improving pulse performance. When evaluated against the state-of-the-art baseline PAQOC on a realistic, inhomogeneous hardware model, d'ArQ demonstrates superior performance. Notably, d'ArQ reduces circuit latency up to 22.8% and compilation time up to 56.8%, establishing a more robust and physically realistic path for circuit compilation.
Quantum computing is an emerging technology in which quantum mechanical properties are suitably utilized to perform certain compute-intensive operations faster than classical computers. Quantum algorithms are designed as a combination of quantum circuits that each require a large number of quantum gates, which is a challenge considering the limited number of qubit resources available in quantum computing systems. Our work proposes a technique to optimize quantum arithmetic algorithms by reducing the hardware resources and the number of qubits based on ZX calculus. We have utilized ZX calculus rewrite rules for the optimization of fault-tolerant quantum multiplier circuits where we are able to achieve a significant reduction in the number of ancilla bits and T-gates as compared to the originally required numbers to achieve fault-tolerance. Our work is the first step in the series of arithmetic circuit optimization using graphicalrewrite tools and it pavesthe way for advancing the optimization of various complex quantum circuits and establishing the potential for new applications of the same.