Abstract As quantum computing progresses toward large-scale implementation, there is a growing demand for cryo-compatible artificial intelligence hardware and computing paradigms that accelerate the quantum control and error correction. Here, we present a superconducting memory device composed of a flux-quanta storage loop and a superconducting quantum interference device (SQUID), functioning as an artificial synapse and a binary stochastic neuron, respectively. Information is encoded in the stochastic behavior of the pulse stream passing through the neuron and is extracted by counting the number of SQUID switching events. In this scheme, sampling precision is flexibly tunable by adjusting the total number of input pulses. This architecture enables both neuromorphic and probabilistic computing, achieving 100% accuracy in nine-pixel image classification and integer factorization tasks by tuning the sampling precision. Furthermore, we found that the fabrication non-uniformities of up to 7.1% can be effectively compensated by an increased coupling strength. These results highlight the potential of superconducting memory devices as scalable and robust building blocks for implementing versatile AI computing paradigms under cryogenic conditions.
Abstract As quantum computing progresses toward large-scale implementation, there is a growing demand for cryo-compatible artificial intelligence hardware and computing paradigms that accelerate the quantum control and error correction. Here, we present a superconducting memory device composed of a flux-quanta storage loop and a superconducting quantum interference device (SQUID), functioning as an artificial synapse and a binary stochastic neuron, respectively. Information is encoded in the stochastic behavior of the pulse stream passing through the neuron and is extracted by counting the number of SQUID switching events. In this scheme, sampling precision is flexibly tunable by adjusting the total number of input pulses. This architecture enables both neuromorphic and probabilistic computing, achieving 100% accuracy in nine-pixel image classification and integer factorization tasks by tuning the sampling precision. Furthermore, we found that the fabrication non-uniformities of up to 7.1% can be effectively compensated by an increased coupling strength. These results highlight the potential of superconducting memory devices as scalable and robust building blocks for implementing versatile AI computing paradigms under cryogenic conditions.
Cryogenic (cryo) memory devices, designed to operate at/below 4 Kelvin (K) temperature, is a prime enabler of practical quantum computing systems, and superconducting (SC) electronic platforms (Figs. 1(a), (b)) [1]. The state-of-the-art quantum algorithms require many arbitrary rotations which demand a large memory to store program instructions [2]. SC qubits (used in most of the existing quantum computing systems) are highly sensitive to noise and hence, to protect the qubit states from thermal disturbances, they are placed at a few milli-Kelvin (mK) temperature. Furthermore, to preserve the integrity of the quantum states, the SC qubits undergo continuous error correction schemes, requiring extensive memory and bandwidth [2]. Superconducting electronics (SCE) (targeted towards space applications, and high-performance computing) outperforms the conventional CMOS counterparts in terms of speed and energy-efficiency (Fig. 1(c)) [3]. Decades of research efforts have given rise to three major categories (and several sub-variants) of cryo-memories based on SC, non-SC, and hybrid technologies (Fig. 2) [2], [4]–[6]. However, the existing variants suffer from one or more of the following challenges - (i) limited scalability, (ii) process complexity, (iii) bulky peripherals, (iv) array-level interference, (v) volatility, and (vi) speed incompatibility. Therefore, a scalable cryo-memory system remains elusive. To address these existing issues, here, we present a novel cryo-memory system utilizing -(i) the polarization-induced Cooper-pair [7] modulation in a ferroelectric(FE)superconducting quantum interference device (SQUID) (Fig. 3(a)) [8], and (ii) current controlledSC↔non−SCswitching in a heater cryotron(hTron)(Fig. 4) [4]. Discrete prototypes of these devices have been demonstrated recently, but their coupled interactions (which we harness in our work) were never explored before.
Over the past few decades, superconducting circuits have been used to realize various novel electronic devices such as quantum bits, SQUIDs, parametric amplifiers, etc. One domain, however, where superconducting circuits fall short is information storage. Superconducting memories are based on the quantization of magnetic flux in superconducting loops. Standard implementations store information as magnetic flux quanta in a superconducting loop interrupted by two Josephson junctions (i.e., a SQUID). However, due to the large inductance required, the size of the SQUID loop cannot be scaled below several micrometers, resulting in low-density memory chips. Here, we propose a scalable memory consisting of a voltage-biased superconducting ring threaded by a half-quantum flux bias. By numerically solving the time-dependent Ginzburg-Landau equations, we show that applying a time-dependent bias voltage in the microwave range constitutes a writing mechanism to change the number of stored flux quanta within the ring. Since the proposed device does not require a large loop inductance, it can be scaled down, enabling a high-density memory technology.
Abstract Developing the field of neuromorphic quantum computing necessitates designing scalable quantum memory devices. Here, we propose a superconducting quantum memory device in the microwave regime, termed a microwave quantum memcapacitor. It comprises two linked resonators, the primary one is coupled to a Superconducting Quantum Interference Device, which allows for the modulation of the resonator properties through external magnetic flux. The auxiliary resonator, operated through weak measurements, provides feedback to the primary resonator, ensuring stable memory behavior. This device operates with a classical input in one cavity while reading the response in the other, serving as a fundamental building block toward arrays of microwave quantum memcapacitors. We observe that a bipartite setup can retain its memory behavior and gains entanglement and quantum correlations. Our findings pave the way for the experimental implementation of memcapacitive superconducting quantum devices and memory device arrays for neuromorphic quantum computing.
A novel superconducting neuron circuit and two types of variable synapses, which are based on superconducting quantum interferometer devices (SQUIDs), are presented. A neuron circuit with good input-output isolation and steep threshold characteristics is accomplished using a combination of a single-junction SQUID coupled to a double-junction SQUID. The quantum state of the single-junction SQUID represents the neuron state, and the output voltage of the double-junction SQUID, which is operated in a nonlatching mode with shunt resistors, is a sigmoid-shaped function of the input. Both variable synapse circuits are composed of multiple shunted double-junction SQUIDs. The first type changes its conductance value by using both superconducting and voltage states. The second variable synapse circuit changes its output current digitally by switching its bias currents. Besides numerical simulations of the circuit characteristics, we have fabricated superconducting neural chips in a Nb/AlO/sub x//Nb Josephson junction technology. The fundamental operation of each element and a 2-bit neural-based A/D converter have been successfully tested. A learning system with a variable synapse is also discussed.>
Ferroelectric Superconducting Quantum Interference Devices (Fe-SQUIDs) have recently gained attention as a transformative technology for superconducting computing, offering voltage-controlled switching that is essential for large-scale digital circuits. This unique technology has the potential to drive advancements in cryogenic computing by enabling scalable memory systems and voltage-controlled logic circuits. These innovations are critical for the realization of large-scale quantum computers and hold significant promise for high-performance computing and space exploration. In this article, we explore how Fe-SQUIDs, integrated with heater cryotrons (hTrons), can be harnessed to develop key components of computing systems. These include non-volatile memory, voltage-controlled logic circuits, in-memory matrix-vector multiplication systems, and ternary content-addressable memory. We also examine how changes in the key characteristics of Fe-SQUIDs and hTrons influence the performance of these applications, providing insights into the design and optimization of next-generation superconducting hardware.
The recent progress in quantum computing and space exploration led to a surge in interest in cryogenic electronics. Superconducting devices such as Josephson junction, Josephson field effect transistor, cryotron, and superconducting quantum interference device (SQUID) are traditionally used to build cryogenic logic gates. However, due to the superconducting nature, gate-voltage-based control of these devices is extremely difficult. Even more challenging is to cascade the logic gates because most of these devices require current bias for their operation. Therefore, these devices are not as convenient as the semiconducting transistors to design logic gates. Here, to overcome these challenges, we propose a ferroelectric SQUID (FeSQUID) based voltage-controlled logic gates. FeSQUID exhibits two different critical current levels for two different voltage-switchable polarization states of the ferroelectric. We utilize the polarization-dependent (hence, voltage-controllable) superconducting to resistive switching of FeSQUID to design Boolean logic gates such as Copy, NOT, AND, and OR gates. The operations of these gates are verified using a Verilog-A-based compact model of FeSQUID. Finally, to demonstrate the fanning out capability of FeSQUID-based logic family, we simulate a two-input XOR gate using FeSQUID-based NOT, AND, and OR gates. Together with the ongoing progress on FeSQUID-based non-volatile memory, our designed FeSQUID-based logic family will enable all FeSQUID-based cryogenic computer, ensuring minimum mismatch between logic and memory blocks in terms of speed, power consumption, and fabrication process.