Quantum annealing is a quantum algorithm to solve combinatorial optimization problems. In current quantum annealing devices, the dynamic range of the input Ising Hamiltonian greatly affects the quality of the output solution due to the limit of precision of hardware. Several methods have been proposed to reduce the dynamic range by reducing large coefficients in the Ising Hamiltonian. However, existing studies do not take into account minor-embedding, which is an essential process in current quantum annealers. In this study, we revisit three existing coefficient reduction methods, taking minor-embedding into consideration. We evaluate to what extent these methods reduce the dynamic range of the minorembedded Hamiltonian and improve the sample quality of hardware, using the D-Wave Advantage quantum annealer. The results show that, on the set of problems tested in this study, the interaction-extension method effectively improves accuracy by reducing the dynamic range, while the bounded-coefficient integer encoding and augmented Lagrangian methods have only limited effect. Furthermore, we empirically show that the coefficients of linear terms need not be reduced at the logical Hamiltonian level in practice, since minor-embedding automatically has the role of reducing them. These findings suggest future directions of enhancing the sample quality of quantum annealers by preprocessing the input problem.
Quantum annealing is a quantum algorithm to solve combinatorial optimization problems. In current quantum annealing devices, the dynamic range of the input Ising Hamiltonian greatly affects the quality of the output solution due to the limit of precision of hardware. Several methods have been proposed to reduce the dynamic range by reducing large coefficients in the Ising Hamiltonian. However, existing studies do not take into account minor-embedding, which is an essential process in current quantum annealers. In this study, we revisit three existing coefficient reduction methods, taking minor-embedding into consideration. We evaluate to what extent these methods reduce the dynamic range of the minorembedded Hamiltonian and improve the sample quality of hardware, using the D-Wave Advantage quantum annealer. The results show that, on the set of problems tested in this study, the interaction-extension method effectively improves accuracy by reducing the dynamic range, while the bounded-coefficient integer encoding and augmented Lagrangian methods have only limited effect. Furthermore, we empirically show that the coefficients of linear terms need not be reduced at the logical Hamiltonian level in practice, since minor-embedding automatically has the role of reducing them. These findings suggest future directions of enhancing the sample quality of quantum annealers by preprocessing the input problem.
Quantum annealing is a quantum algorithm to solve combinatorial optimization problems. In the current quantum annealing devices, the dynamic range of the input Ising Hamiltonian, defined as the ratio of the largest to the smallest coefficient, significantly affects the quality of the output solution due to limited hardware precision. Several methods have been proposed to reduce the dynamic range by reducing large coefficients in the Ising Hamiltonian. However, existing studies do not take into account minor-embedding, which is an essential process in current quantum annealers. In this study, we revisit three existing coefficient-reduction methods under the constraints of minor-embedding. We evaluate to what extent these methods reduce the dynamic range of the minor-embedded Hamiltonian and improve the sample quality obtained from the D-Wave Advantage quantum annealer. The results show that, on the set of problems tested in this study, the interaction-extension method effectively improves the sample quality by reducing the dynamic range, while the bounded-coefficient integer encoding and the augmented Lagrangian method have only limited effects. Furthermore, we empirically show that reducing external field coefficients at the logical Hamiltonian level is not required in practice, since minor-embedding automatically has the role of reducing them. These findings suggest future directions for enhancing the sample quality of quantum annealers by suppressing hardware errors through preprocessing of the input problem.
Abstract Quantum annealing is a type of analog computation that aims to use quantum mechanical fluctuations in search of optimal solutions of QUBO (quadratic unconstrained binary optimization) or, equivalently, Ising problems. Since NP-hard problems can in general be mapped to Ising and QUBO formulations, the quantum annealing paradigm has the potential to help solve various NP-hard problems. Current quantum annealers, such as those manufactured by D-Wave Systems, Inc. have various practical limitations including the size (number of qubits) of the problem that can be solved, the qubit connectivity, and error due to the environment or system calibration, which can reduce the quality of the solutions. Typically, for an arbitrary problem instance, the corresponding QUBO (or Ising) structure will not natively embed onto the available qubit architecture on the quantum chip. Thus, in these cases, a minor embedding of the problem structure onto the device is necessary. However, minor embeddings on these devices do not always make use of the full sparse chip hardware graph, and a large portion of the available qubits stay unused during quantum annealing. In this work, we embed a disjoint random QUBO on the unused parts of the chip alongside the QUBO to be solved, which acts as an indicator of the solution quality of the device over time. Using experiments on three different D-Wave quantum annealers, we demonstrate that (i) long term trends in solution quality exist on the D-Wave device, and (ii) the unused qubits can be used to measure the current level of noise of the quantum system.
Quantum annealing provides a promising route for the development of quantum optimization devices, but the usefulness of such devices will be limited in part by the range of implementable problems as dictated by hardware constraints. To overcome constraints imposed by restricted connectivity between qubits, a larger set of interactions can be approximated using minor embedding techniques whereby several physical qubits are used to represent a single logical qubit. However, minor embedding introduces new types of errors due to its approximate nature. We introduce and study quantum annealing correction schemes designed to improve the performance of quantum annealers in conjunction with minor embedding, thus leading to a hybrid scheme defined over an encoded graph. We argue that this scheme can be efficiently decoded using an energy minimization technique provided the density of errors does not exceed the per-site percolation threshold of the encoded graph. We test the hybrid scheme using a D-Wave Two processor on problems for which the encoded graph is a two-level grid and the Ising model is known to be NP-hard. The problems we consider are frustrated Ising model problem instances with ``planted'' (a priori known) solutions. Applied in conjunction with optimized energy penalties and decoding techniques, we find that this approach enables the quantum annealer to solve minor embedded instances with significantly higher success probability than it would without error correction. Our work demonstrates that quantum annealing correction can and should be used to improve the robustness of quantum annealing not only for natively embeddable problems but also when minor embedding is used to extend the connectivity of physical devices.
Minor embedding is essential for mapping largescale combinatorial problems onto quantum annealers, particularly in quantum machine learning and optimization. This work presents an optimized, universal minor-embedding framework that efficiently accommodates complete bipartite graphs onto the hardware topology of quantum annealers. By leveraging the inherent topographical periodicity of the physical quantum adiabatic annealer processor, our method systematically reduces qubit chain lengths, resulting in enhanced stability, computational efficiency, and scalability of quantum annealing. We benchmark our embedding framework against Minorminer, the default heuristic embedding algorithm, for the Pegasus topology, demonstrating that our approach significantly improves embedding quality. Our empirical results show a 99.98% reduction in embedding time for a 120 x 120 complete bipartite graphs. Additionally, our method eliminates long qubit chains, which primarily cause decoherence and computational errors in quantum annealing. These findings advance the scalability of quantum embeddings, particularly for quantum generative models, anomaly detection, and large-scale optimization tasks. Our results establish a foundation for integrating efficient quantum-classical hybrid solutions, paving the way for practical applications in quantum-enhanced machine learning and optimization.
One of the main bottlenecks in solving combinatorial optimization problems with quantum annealers is the qubit connectivity in the hardware. A possible solution for larger connectivity is minor embedding. This technique makes the geometrical properties of the combinatorial optimization problem, encoded as a Hamiltonian, match the properties of the quantum annealing hardware. The embedding itself is a hard computational problem, and therefore heuristic algorithms are required. In this work we present fixed, modular, and scalable embeddings that can be used to embed any combinatorial optimization problem described as an Ising Hamiltonian. These embeddings are the result of an extension of the well-known parity mapping, which has been used in the past to map higher-order Ising Hamiltonians to quadratic Hamiltonians, which are suitable for existing quantum hardware. We show how our new embeddings can be mapped to existing quantum annealers and that the embedded Hamiltonian physical properties match the original Hamiltonian properties.
Quantum annealing is a quantum algorithm for computing solutions to combinatorial optimization problems. This study proposes a method for minor embedding optimization problems onto sparse quantum annealing hardware graphs called 4-clique network minor embedding. This method is in contrast to the standard minor embedding technique of using a path of linearly connected qubits in order to represent a logical variable state. The 4-clique minor embedding is possible on Pegasus graph connectivity, which is the native hardware graph for some of the current D-Wave quantum annealers. The Pegasus hardware graph contains many cliques of size 4, making it possible to form a graph composed entirely of paths of connected 4-cliques on which a problem can be minor-embedded. The 4-clique chains come at the cost of additional qubit usage on the hardware graph, but they allow for stronger coupling within each chain, thereby increasing chain integrity, reducing chain breaks, and allow for greater usage of the available energy scale for programming logical problem coefficients on current quantum annealers. The 4-clique minor embedding technique is compared with the standard linear path minor embedding with experiments on two D-Wave quantum annealing processors with Pegasus hardware graphs. We show proof-of-concept experiments where the 4-clique minor embeddings can use weak chain strengths while successfully carrying out the computation of minimizing random all-to-all spin glass problem instances. Published by the American Physical Society 2024