Qudits allow the encoding and manipulation of additional quantum information compared to that stored to a two-level qubit system. Although manipulations of qudit states are generally more complex and can introduce extra sources of noise, qudits can still be used in a number of applications when this error can be kept sufficiently low. One such application is the case of the Bucket Brigade Algorithm for realizing a Quantum RAM (QRAM), which inherently uses qutrits for encoding the state of address switches. In this paper, we study a methodology for qutrit manipulation that leverages efficient encoding techniques and pulse calibration methods for the case of transmon systems. The methodology employs an encoding scheme that allows the execution of controlled operations, using the subspace spanned by the two lowest levels of the transmon; we show how this scheme can be used for generating one- and two-qutrit gates by leveraging the Qiskit and Boulder Opal frameworks to compute the parameters of pulses that implement the quantum gates that are used by the BBA. For this type of gate, simulations show that the pulses perform the required operations with a low infidelity when errors introduced by the qutrit Hamiltonian dynamics are considered.
Qudits allow the encoding and manipulation of additional quantum information compared to that stored to a two-level qubit system. Although manipulations of qudit states are generally more complex and can introduce extra sources of noise, qudits can still be used in a number of applications when this error can be kept sufficiently low. One such application is the case of the Bucket Brigade Algorithm for realizing a Quantum RAM (QRAM), which inherently uses qutrits for encoding the state of address switches. In this paper, we study a methodology for qutrit manipulation that leverages efficient encoding techniques and pulse calibration methods for the case of transmon systems. The methodology employs an encoding scheme that allows the execution of controlled operations, using the subspace spanned by the two lowest levels of the transmon; we show how this scheme can be used for generating one- and two-qutrit gates by leveraging the Qiskit and Boulder Opal frameworks to compute the parameters of pulses that implement the quantum gates that are used by the BBA. For this type of gate, simulations show that the pulses perform the required operations with a low infidelity when errors introduced by the qutrit Hamiltonian dynamics are considered.
The bucket-brigade architecture [1], [2]—a tree-based quantum memory encoding scheme—is a QRAM encoding design with one of the lowest known computational complexities. It theoretically offers a polylogarithmic complexity [3]–[5], although in practical gate-based implementations, the gate count scales exponentially with the number of qubits. Despite theoretical advancements, no algorithm yet exists that can generate QRAM basis encoding circuits for arbitrary input datasets, which is a significant barrier to practical encoding scalability. This paper proposes an algorithm capable of generating such circuits more efficiently than the standard bucket-brigade construction, thus reducing the number of address accesses and overall gate complexity. The asymptotic upper bound of the encoding circuit generated by our algorithm is derived to be O(2k~(k~+d)), which achieves asymptotically exponential savings over general unitary synthesis as shown later in the paper. The resulting circuits provide a quantum data encoding layer that can be composed with downstream query or transform routines when needed. An example vector will be used throughout this paper to demonstrate a 60% gate count reduction. This is the first automated implementation of its kind-a foundational step towards developing a scalable QRAM encoding for quantum computing systems.
Quantum random access memory (QRAM) enables efficient classical data access for quantum computers -- a prerequisite for many quantum algorithms to achieve quantum speedup. Despite various proposals, the experimental realization of QRAM remains largely unexplored. Here, we experimentally investigate the circuit-based bucket-brigade QRAM with a superconducting quantum processor. To facilitate the experimental implementation, we introduce a hardware-efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit by more than 30% compared to the conventional controlled-SWAP-based implementation. We further propose an error mitigation method to boost the QRAM query fidelity. With these techniques, we are able to experimentally implement the QRAM architectures with two and three layers, achieving query fidelities up to 0.800 ± 0.026 and 0.604$\pm$0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, providing experimental evidence for the noise resilience nature of the bucket-brigade QRAM architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture.
Quantum random access memory (qRAM) is valuable for applying quantum computers to a broad range of problems and for successfully implementing large-scale quantum computation systems. Despite its importance, its adoption may be restricted by the fact that the decomposition of the qRAM function contains non-transversal gates, which cannot be executed transversally on any quantum error correction (QEC) code. To overcome these limitations, existing works employ techniques like magic state distillation. However, distillation is time-and qubit-intensive. This paper presents a fault-tolerant, resource-efficient implementation of qRAM based on pieceable fault tolerance. By breaking the logical CSWAP and Toffoli gate into simpler, easier-to-execute but non-transversal components, we first show that bucket-brigade qRAM can be implemented in polynomial depth without the need for ancillary magic states, further gate decomposition, or other gates. Afterward, we demonstrate the resource efficiency of this method of attaining fault tolerance in quantum operations. Based on resource estimation results, fault-tolerant bucket brigades using the pieceable technique perform better than fault-tolerant bucket brigades using magic state distillation with respect to the number of physical qubits, time, and cost.
Quantum routers (QRouters) are essential components of bucket-brigade quantum random access memory (QRAM), enabling quantum applications such as Grover’s search and quantum machine learning. Despite significant theoretical advances, achieving scalable and coherent QRouters experimentally remains challenging. Here, we demonstrate coherent quantum routers using a superconducting quantum processor, laying a practical foundation for scalable QRAM systems. The quantum router at the core of our implementation utilizes the transition composite gate scheme, wherein auxiliary energy levels temporarily mediate conditional interactions. By leveraging two-qubit primitives in its construction, the quantum router preserves straightforward initialization and calibration while significantly reducing circuit depth and duration relative to traditional gate-based decompositions. Moreover, by encoding routing addresses in the nonadjacent qutrit states | 0 ⟩ and | 2 ⟩ , our design inherently enables erasure-detection capability, providing efficient postselection to mitigate routing errors. Experimentally, we achieve an average fidelity of 94.8% across three individual QRouters, and we validate scalability through a two-layer quantum routing network achieving a fidelity of 82.4%. Our results represent a significant advancement in quantum routing technology, providing enhanced fidelity, built-in error resilience, and practical scalability crucial for the development of future QRAM and large-scale quantum computing architectures.
The preparation of data in quantum states is a critical component in the design of quantum algorithms. The cost of this step can significantly limit the realization of quantum advantage in domains such as machine learning, finance, and chemistry. One of the main approaches to achieve efficient state preparation is through the use of Quantum Random Access Memory (QRAM), a theoretical device for coherent data access with several proposed hardware implementations. In this work, we present a framework that integrates the hardware model of the Bucket Brigade QRAM (BBQRAM) with the classical data structure of the Segment Tree to achieve efficient state preparation. We introduce a memory layout that embeds a segment tree within BBQRAM memory cells by preserving the segment tree's hierarchy and supporting data retrieval in logarithmic time via specialized access primitives. We demonstrate that our method encodes a matrix A∈RM×N in a quantum register of Θ(log2(MN)) qubits in O(log22(MN)) time, {requiring a constant number of working qubits (under fixed precision) and O(MN) memory cells within the BBQRAM architecture.} We further illustrate the method through a numerical example. This framework provides theoretical support for quantum algorithms that assume negligible data loading overhead and establishes a foundation for designing classical-to-quantum encoding algorithms that are aware of the underlying hardware QRAM architecture.
Quantum computing offers the potential to surpass classical computing speeds by leveraging quantum entanglement and superposition. However, progress towards fault-tolerant quantum computers is limited by low qubit counts and considerable gate errors. A promising direction involves transitioning from two-level qubits to d-level qudits, expanding the state space beyond conventional qubit-based quantum computers. The superconducting transmon-tunable coupler-transmon (TTT) system has emerged as a key building block of current quantum processors. Recent demonstration has shown its capability to host three-level qudits (qutrits), including the implementation of qutrit controlled-phase (CPhase) gate via an adiabatic scheme. Despite this progress, further modeling or optimization studies for the qudit-based TTT system are still unexplored. In this work, we propose an integrated simulation framework that predicts the cross-Kerr interactions of the TTT system and the fidelities of two-qutrit CPhase gate with the presence of noise effect. We validate the prediction of the cross-Kerr interactions against data from TTT systems reported in the literature. We also identify the conditions for the maximum target frequency in the adiabatic scheme necessary to achieve higher qutrit CPhase gate fidelity. Furthermore, we demonstrate the control-device co-optimization of the system, showing the potential of achieving the highest gate fidelity allowed by the hardware and noise. This work provides valuable insights which can guide the development towards more reliable and powerful superconducting quantum processors.