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International Journal of Computational Science and Engineering

Optimisation of quantum circuits using cost effective quantum gates

Swathi Mummadi, Bhawana Rudra

Published Jan 1, 2025• 1 citation
Publisher

Abstract

The importance of reversible operations has increased with the emergence of new technologies. Reversible operations are crucial for developing energy-efficient and cost-efficient circuits. The efficiency of a quantum circuit is measured in terms of quantum cost and quantum depth. In this paper, we propose an optimisation algorithm for reversible gates like the Peres gate, Toffoli gate, and the entanglement purification method. Peres and Toffoli gates play an important role in quantum circuit implementation, and entanglement purification plays a key role in various applications like quantum teleportation, secure communication, quantum key distribution, etc. The proposed algorithm optimises the quantum cost and quantum depth to 20% compared to the existing approaches.

DOI
10.1504/ijcse.2025.144807

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The importance of reversible operations has increased with the emergence of new technologies. Reversible operations are crucial for developing energy-efficient and cost-efficient circuits. The efficiency of a quantum circuit is measured in terms of quantum cost and quantum depth. In this paper, we propose an optimisation algorithm for reversible gates like the Peres gate, Toffoli gate, and the entanglement purification method. Peres and Toffoli gates play an important role in quantum circuit implementation, and entanglement purification plays a key role in various applications like quantum teleportation, secure communication, quantum key distribution, etc. The proposed algorithm optimises the quantum cost and quantum depth to 20% compared to the existing approaches.
The importance of reversible operations has increased with the emergence of new technologies. Reversible operations are crucial for developing energy-efficient and cost-efficient circuits. The efficiency of a quantum circuit is measured in terms of quantum cost and quantum depth. In this paper, we propose an optimisation algorithm for reversible gates like the Peres gate, Toffoli gate, and the entanglement purification method. Peres and Toffoli gates play an important role in quantum circuit implementation, and entanglement purification plays a key role in various applications like quantum teleportation, secure communication, quantum key distribution, etc. The proposed algorithm optimises the quantum cost and quantum depth to 20% compared to the existing approaches.
Reversible logic is expanding grounds with its applicability to various upcoming technologies and quantum computation. Numerous reversible gates has also been proposed for designing logic circuits apart of basic quantum controlled Toffoli and Fredkin gates. A comparative study and analysis of a range of reversible gates from the literature is presented in this paper to obtain an optimal solution for designing these circuits. The gates are synthesized and implemented to obtain equivalent quantum circuits and operating cost in terms of number of inputs, gate cost, quantum cost, garbage output and ancilla input. The comparison is done at two subsequent levels i.e. gates structural level and circuit design level, providing a better solution for designing logic circuits. It is calculated that, basic gates are 50% efficient at gate level and 33% at design level analysis in terms of gate cost, as compared to the most efficient gates proposed in the literature.
The minimization of Quantum Cost (QC), specifically the number of Toffoli gates, is a primary objective in the synthesis of reversible arithmetic circuits. For decades, the Peres Full Adder has been considered the benchmark for minimal realizations, requiring 2 Toffoli gates and a Quantum Cost of 12. In this note, we propose a novel reversible Full Adder circuit that utilizes only one Toffoli gate and four CNOT gates. The proposed design achieves a Quantum Cost of 9, representing a 25% reduction compared to the Peres structure, while maintaining a competitive logical depth of 4. We rigorously verify the logic and demonstrate that the reduction is achieved through the automated synthesis framework recently proposed by the authors.
In the context of modern Very Large-Scale Integration (VLSI) technology, information loss has been a major concern. Logic gates (LG) such as AND, OR, and NOT have been found to result in information loss during their operations. To address this issue, reversible LGs have been created. The development and implementation of a high-speed, efficient full adder circuit employing reversible LGs like Feynman, Toffoli, and Peres gates. The design aims to improve computational and thermal efficiencies. The circuit refarding quantum costs (QC), garbage outputs, and ancillary inputs. The implemented the suggested design in Verilog and verified the entire adder's functionality and efficiency through simulations using the Xilinx Vivado and Xilinx ISE tools. The circuit has a quantum cost of 10 with two outputs of useless and one auxiliary input, according to the researchers, highlighting its opportunities for usage in quantum computing applications andlow-power (dec 84%), high-performance computing systems.
Quantum computing is one of the most significant anticipation towards the accomplishment of interminable consumer demands of small, high speed, and low-power operable electronics devices. As reversible logic circuits have direct applicability to quantum circuits, design and synthesis of these circuits are finding grounds for emerging nano-technologies of quantum computing. Multiple Controlled Toffoli (MCT) and Multiple Controlled Fredkin (MCF) are the fundamental reversible gates that playing key role in this phase of development. A number of special reversible gates have also been presented so far, which were claimed superior for providing certain purposes like logic development and testing. This paper critically analyses a range of these gates to procure an optimal solution for design, synthesis and testing of reversible circuits. The experimentation is facilitated at three subsequent levels, i.e. gates properties, quantum cost and design & testability. MCT and MCF gates are found up to 50% more cost-effective than special gates at design level and 34.4% at testability level. Maximum reversibility depth (MRD) is included as a new measurement parameter for comparison. Special gates exhibit MRD up to 7 which ideally should be 1 for a system to be physically reversible as that of MCT and MCF gates.
Reversible logic is one of the stepping stones in low power circuit design. Due to low power consumption and minimum bit loss features, future quantum computing devices are estimated to be reversible. Compared to addition, multiplication is a step further in the ladder of abstraction. It is the manifestation of a pattern generation system capable of representing 3-D patterns and transforming them by rotation, projection, reflection etc. The use of reversible logic in this field can reduce the wastage of energy, power and improve many factors. In this paper, an efficient multiplication algorithm has been proposed which is a modification of conventional shift-and-add multiplication method. Implementing proposed algorithm two reversible multiplier circuit has been proposed. For producing partial product, Peres gate has been used for the first design and Toffoli gate for the second design. Both of the circuits use Peres gate as Half-Adder and HNG gate as Full-Adder for addition of partial products. The first design is improved radically in terms of quantum cost, delay and the second design is notably improved in terms of transistor count and hardware complexity compared to the existing best known multipliers.