Cryogenic classical electronics for the control of qubits can be placed near quantum processors for a more compact system, ultimately enabling a highly scalable one. However, cryogenic operation poses very strict power requirements on electronics, in addition to heavy constraints on precision in both amplitude and phase, as well as noise, so as to achieve the necessary fidelity. To test all the trade-offs that arise from these requirements, detailed simulations based on the physics of qubits and on the effects that circuits may have on them are needed. This paper focuses on the models and the simulation framework needed for quantum processors that can be efficiently executed on classical hardware. These models allow circuit design and specification derivation at all levels of the design. The suitability of the approach is demonstrated with superconducting qubit platforms and their control and characterization.
Cryogenic classical electronics for the control of qubits can be placed near quantum processors for a more compact system, ultimately enabling a highly scalable one. However, cryogenic operation poses very strict power requirements on electronics, in addition to heavy constraints on precision in both amplitude and phase, as well as noise, so as to achieve the necessary fidelity. To test all the trade-offs that arise from these requirements, detailed simulations based on the physics of qubits and on the effects that circuits may have on them are needed. This paper focuses on the models and the simulation framework needed for quantum processors that can be efficiently executed on classical hardware. These models allow circuit design and specification derivation at all levels of the design. The suitability of the approach is demonstrated with superconducting qubit platforms and their control and characterization.
Cryogenic classical electronics for the control of qubits can be placed near quantum processors for a more compact system, ultimately enabling a highly scalable one. However, cryogenic operation poses very strict power requirements on electronics, in addition to heavy constraints on precision in both amplitude and phase, as well as noise, so as to achieve the necessary fidelity. To test all the trade-offs that arise from these requirements, detailed simulations based on the physics of qubits and on the effects that circuits may have on them are needed. This paper focuses on the models and the simulation framework needed for quantum processors that can be efficiently executed on classical hardware. These models allow circuit design and specification derivation at all levels of the design. The suitability of the approach is demonstrated with superconducting qubit platforms and their control and characterization.
Scaling up to a full-scale multi-qubit processor adds complexity to the control signals input requirements which can be addressed by the use of specially designed cryogenic interface circuits. In this paper, we discuss the use of cryogenic classical electronics for control of a fluxonium artificial atom. In recent years, fluxonium has gained notoriety among the superconducting qubit community for exceptionally long coherence times and large anharmonicity - both highly desirable properties when designing the next generation of qubit systems. The feasibility of controlling a fluxonium based quantum processors with a compact control system ultimately enables a highly scalable system; however, the cryogenic environment poses very strict requirements on electronics. Many trade-offs arise in terms of noise, power consumption, and circuit complexity. Addressing these requires comprehensive simulations that account for the physics of fluxonium qubits and the potential impact of control circuits on their performance. This paper focuses on the models and specification derivation for qubit control and explores constraints in fluxonium-based system design. The models and specifications derived enable the design of optimal control circuits targeted for scalable fluxonium quantum processors.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits can be implemented in many flavors, but they are fragile, and their state has a tendency to decay in time. To be usable for computation, qubits must be corrected in real time by a classical controller. The controller must also see that desired computations are executed. Today, the control of qubits is performed at room temperature (RT) by racks of instruments, while the qubits operate at several tens of milli-Kelvin. To ensure compactness and, eventually, scalability, we have proposed and implemented CMOS circuits designed to operate at a few degrees Kelvin. This makes complex thermalization circuits unnecessary, potentially enabling superconductive interconnects, which would enable virtually zero resistance and low thermal conductivity. Cryogenic CMOS, or cryo-CMOS, technology was chosen to achieve classical control due to its scalable nature and overall miniaturization opportunities. Cryo-CMOS circuits and systems need to be carefully designed to ensure strict power budgets, while achieving quite advanced specifications in terms of noise and bandwidth. We review the requirements of a classical controller and cryo-CMOS circuits and systems developed for spin qubits in our lab. Results and perspectives are presented with a discussion about a road map for the future.
Quantum computers1 could revolutionize computing in a profound way due to the massive speedup they promise. A quantum computer comprises a cryogenic quantum processor and a classical electronic controller. When scaling up the cryogenic quantum processor to at least a few thousands, and possibly millions, of qubits required for any practical quantum algorithm, cryogenic CMOS (cryo-CMOS) electronics is required to allow feasible and compact interconnections between the controller and the quantum processor. Cryo-CMOS leverages the CMOS fabrication infrastructure while exploiting the continuous improvement of performance and miniaturization guaranteed by Moore's law, in order to enable the fabrication of a cost-effective practical quantum computer. However, designing cryo-CMOS integrated circuits requires a new set of CMOS device models, their embedding in design and verification tools, and the possibility to co-simulate the cryo-CMOS/quantum-processor architecture for full-system optimization. In this paper, we address these challenges by focusing on their impact on the design of complex cryo-CMOS systems.