Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE International Conference on Quantum Software (QSW)

Bounding Rounding Errors in the Simulation of Quantum Circuits

Jonas Klamroth, Bernhard Beckert

Published Jul 7, 2024• 0 citations
Publisher

Abstract

Quantum simulators are a ubiquitous part of quantum software development. This is especially true for the current NISQ-era but will probably remain true for a long time as error-free controlled testing is hardly possible on real devices. However, quantum simulators are implemented in classical languages and thus fall prey to rounding errors. We present bounds on these errors based on the number of gates and qubits alone. This can be crucial to rule out rounding errors prior to executing the circuit. Additionally, we show that these theoretical bounds are sufficient to essentially rule out relevant rounding errors for the simulation of small to medium-sized circuits and even for larger circuits under the assumption that only 1- and 2-qubit gates are used.

DOI
10.1109/qsw62656.2024.00024

Related papers

Joint Cutting for Hybrid Schrödinger-Feynman Simulation of Quantum Circuits

Laura S. Herzog, Lukas Burgholzer, Christian Ufrecht +2 more

Despite the continuous advancements in size and robustness of real quantum devices, reliable large-scale quantum computers are not yet available. Hence, classical simulation of quantum algorithms remains crucial for testing new methods and estimating quantum advantage. Pushing classical simulation methods to their limit is essential, particularly due to their inherent exponential complexity. Besides the established Schrödinger-style full statevector simulation, so-called Hybrid Schrödinger-Feynman (HSF) approaches have shown promise to make simulations more efficient. HSF simulation employs the idea of “cutting” the circuit into smaller parts, reducing their execution times. This, however, comes at the cost of an exponential overhead in the number of cuts. Inspired by the domain of Quantum Circuit Cutting, we propose an HSF simulation method based on the idea of “joint cutting” to significantly reduce the aforementioned overhead. This means that, prior to the cutting procedure, gates are collected into “blocks” and all gates in a block are jointly cut instead of individually. We investigate how the proposed refinement can help decrease simulation times and highlight the remaining challenges. Experimental evaluations show that “joint cutting” can outperform the standard HSF simulation by up to a factor $\approx 4000 \times$ and the Schrödinger-style simulation by a factor $\approx 200 \times$ for suitable instances. The implementation is available at https://github.com/cda-tum/mqt-qsim-joint-cutting.

arXiv:2502.06959•ACM/IEEE Design Automation Conference (DAC)•Jun 22, 2025•0 citations

Hamiltonian simulation algorithms for near-term quantum hardware

Laura Clinton, Johannes Bausch, Toby S. Cubitt

The quantum circuit model is the de-facto way of designing quantum algorithms. Yet any level of abstraction away from the underlying hardware incurs overhead. In this work, we develop quantum algorithms for Hamiltonian simulation "one level below" the circuit model, exploiting the underlying control over qubit interactions available in most quantum hardware and deriving analytic circuit identities for synthesising multi-qubit evolutions from two-qubit interactions. We then analyse the impact of these techniques under the standard error model where errors occur per gate, and an error model with a constant error rate per unit time. To quantify the benefits of this approach, we apply it to time-dynamics simulation of the 2D spin Fermi-Hubbard model. Combined with new error bounds for Trotter product formulas tailored to the non-asymptotic regime and an analysis of error propagation, we find that e.g. for a 5 × 5 Fermi-Hubbard lattice we reduce the circuit depth from 1, 243, 586 using the best previous fermion encoding and error bounds in the literature, to 3, 209 in the per-gate error model, or the circuit-depth-equivalent to 259 in the per-time error model. This brings Hamiltonian simulation, previously beyond reach of current hardware for non-trivial examples, significantly closer to being feasible in the NISQ era.

arXiv:2003.06886•Nature Communications•Aug 17, 2021•80 citations

Quantum Rounding

Rajiv Krishnakumar, William J. Zeng

We introduce new rounding methods to improve the accuracy of finite precision quantum arithmetic. These quantum rounding methods are applicable when multiple samples are being taken from a quantum program. We show how to use multiple samples to stochastically suppress arithmetic error from rounding. We benchmark these methods on the multiplication of fixed-point numbers stored in quantum registers. We show that the gate counts and depths for multiplying to a target accuracy can be reduced by approximately 2-3X over state of the art methods while using roughly the same number of qubits.

arXiv:2108.05949•Aug 12, 2021•0 citations

High-Round QAOA for MAX kkk-SAT on Trapped Ion NISQ Devices

Elijah Pelofske, Andreas Bärtschi, John K. Golden +1 more

The Quantum Alternating Operator Ansatz (QAOA) is a hybrid classical-quantum algorithm that aims to sample the optimal solution(s) of discrete combinatorial optimization problems. We present optimized QAOA circuit constructions for sampling MAX$k$-SAT problems, specifically for$k=3$and$k=4$. The novel 4-SAT QAOA circuit construction we present uses measurement based uncomputation, followed by classical feed forward conditional operations. The QAOA circuit parameters for 3-SAT are optimized via exact classical (noise-free) simulation, using HPC resources to simulate up to 20 rounds on 10 qubits. In order to explore the limits of current NISQ devices we execute these optimized QAOA circuits for random 3-SAT test instances with clause-to-variable ratio 4 on four trapped ion quantum computers: Quantinuum H1-1 (20 qubits), IonQ Harmony (11 qubits), IonQ Aria 1 (25 qubits), and IonQ Forte (30 qubits). The QAOA circuits that are executed include$n=10$up to$p=20$, and$n=22$for$p=1$and$p=2$. The high round circuits use upwards of 9,000 individual gate instructions, making these some of the largest QAOA circuits executed on NISQ devices. Our main finding is that current NISQ devices perform best at low round counts (i.e.,$p=1, \ldots, 5$) and then – as expected due to noise – gradually start returning satisfiability truth assignments that are no better than randomly picked solutions as the number of QAOA rounds are further increased.

arXiv:2306.03238•IEEE International Conference on Quantum Computing and Engineering (QCE)•Sep 17, 2023•15 citations

The limits of quantum circuit simulation with low precision arithmetic

S. Betelú

This is an investigation of the limits of quantum circuit simulation with Schrodinger's formulation and low precision arithmetic. The goal is to estimate how much memory can be saved in simulations that involve random, maximally entangled quantum states. An arithmetic polar representation of $B$ bits is defined for each quantum amplitude and a normalization procedure is developed to minimize rounding errors. Then a model is developed to quantify the cumulative errors on a circuit of $Q$ qubits and $G$ gates. Depending on which regime the circuit operates, the model yields explicit expressions for the maximum number of effective gates that can be simulated before rounding errors dominate the computation. The results are illustrated with random circuits and the quantum Fourier transform.

arXiv:2005.13392•May 27, 2020•0 citations

Noise-aware Token Swapping for Qubit Routing

Asim Sharma, Avah Banerjee

In Noisy Intermediate-Scale Quantum (NISQ) era devices, the output fidelity of a quantum circuit, under plausible assumptions, decreases exponentially with its size and depth. As such, optimizing these aspects becomes paramount. This is especially true for sparsely connected physical architectures where added swap gates are essential to meet device connectivity requirements. In this work, we adapt the Approximate Token Swapping (ATS) algorithm, traditionally used for routing qubits, to handle noisy settings by giving priority to specific swap sequences over others. This priority is partially determined by the error rates of the couplings in the qubit connectivity graph. We refer to this algorithm as Priority-ATS (PATS). We provide theoretical justification for PATS's effectiveness over the ATS algorithm and experimentally demonstrate its ability to improve the output state's fidelity. In our simulations, we employ a depolarizing channel to represent two-qubit gate errors, with each neighboring qubit pair having a distinct CNOT gate error rate. By applying realistic error rates, our results prominently highlight an enhanced output fidelity of the quantum circuit when PATS is employed.

IEEE International Conference on Quantum Computing and Engineering (QCE)•Sep 17, 2023•3 citations
Quantum simulators are a ubiquitous part of quantum software development. This is especially true for the current NISQ-era but will probably remain true for a long time as error-free controlled testing is hardly possible on real devices. However, quantum simulators are implemented in classical languages and thus fall prey to rounding errors. We present bounds on these errors based on the number of gates and qubits alone. This can be crucial to rule out rounding errors prior to executing the circuit. Additionally, we show that these theoretical bounds are sufficient to essentially rule out relevant rounding errors for the simulation of small to medium-sized circuits and even for larger circuits under the assumption that only 1- and 2-qubit gates are used.
Despite the continuous advancements in size and robustness of real quantum devices, reliable large-scale quantum computers are not yet available. Hence, classical simulation of quantum algorithms remains crucial for testing new methods and estimating quantum advantage. Pushing classical simulation methods to their limit is essential, particularly due to their inherent exponential complexity. Besides the established Schrödinger-style full statevector simulation, so-called Hybrid Schrödinger-Feynman (HSF) approaches have shown promise to make simulations more efficient. HSF simulation employs the idea of “cutting” the circuit into smaller parts, reducing their execution times. This, however, comes at the cost of an exponential overhead in the number of cuts. Inspired by the domain of Quantum Circuit Cutting, we propose an HSF simulation method based on the idea of “joint cutting” to significantly reduce the aforementioned overhead. This means that, prior to the cutting procedure, gates are collected into “blocks” and all gates in a block are jointly cut instead of individually. We investigate how the proposed refinement can help decrease simulation times and highlight the remaining challenges. Experimental evaluations show that “joint cutting” can outperform the standard HSF simulation by up to a factor ≈4000×\approx 4000 \times≈4000× and the Schrödinger-style simulation by a factor ≈200×\approx 200 \times≈200× for suitable instances. The implementation is available at https://github.com/cda-tum/mqt-qsim-joint-cutting.
The quantum circuit model is the de-facto way of designing quantum algorithms. Yet any level of abstraction away from the underlying hardware incurs overhead. In this work, we develop quantum algorithms for Hamiltonian simulation "one level below" the circuit model, exploiting the underlying control over qubit interactions available in most quantum hardware and deriving analytic circuit identities for synthesising multi-qubit evolutions from two-qubit interactions. We then analyse the impact of these techniques under the standard error model where errors occur per gate, and an error model with a constant error rate per unit time. To quantify the benefits of this approach, we apply it to time-dynamics simulation of the 2D spin Fermi-Hubbard model. Combined with new error bounds for Trotter product formulas tailored to the non-asymptotic regime and an analysis of error propagation, we find that e.g. for a 5 × 5 Fermi-Hubbard lattice we reduce the circuit depth from 1, 243, 586 using the best previous fermion encoding and error bounds in the literature, to 3, 209 in the per-gate error model, or the circuit-depth-equivalent to 259 in the per-time error model. This brings Hamiltonian simulation, previously beyond reach of current hardware for non-trivial examples, significantly closer to being feasible in the NISQ era.
We introduce new rounding methods to improve the accuracy of finite precision quantum arithmetic. These quantum rounding methods are applicable when multiple samples are being taken from a quantum program. We show how to use multiple samples to stochastically suppress arithmetic error from rounding. We benchmark these methods on the multiplication of fixed-point numbers stored in quantum registers. We show that the gate counts and depths for multiplying to a target accuracy can be reduced by approximately 2-3X over state of the art methods while using roughly the same number of qubits.
The Quantum Alternating Operator Ansatz (QAOA) is a hybrid classical-quantum algorithm that aims to sample the optimal solution(s) of discrete combinatorial optimization problems. We present optimized QAOA circuit constructions for sampling MAXkkk-SAT problems, specifically fork=3k=3k=3andk=4k=4k=4. The novel 4-SAT QAOA circuit construction we present uses measurement based uncomputation, followed by classical feed forward conditional operations. The QAOA circuit parameters for 3-SAT are optimized via exact classical (noise-free) simulation, using HPC resources to simulate up to 20 rounds on 10 qubits. In order to explore the limits of current NISQ devices we execute these optimized QAOA circuits for random 3-SAT test instances with clause-to-variable ratio 4 on four trapped ion quantum computers: Quantinuum H1-1 (20 qubits), IonQ Harmony (11 qubits), IonQ Aria 1 (25 qubits), and IonQ Forte (30 qubits). The QAOA circuits that are executed includen=10n=10n=10up top=20p=20p=20, andn=22n=22n=22forp=1p=1p=1andp=2p=2p=2. The high round circuits use upwards of 9,000 individual gate instructions, making these some of the largest QAOA circuits executed on NISQ devices. Our main finding is that current NISQ devices perform best at low round counts (i.e.,p=1,…,5p=1, \ldots, 5p=1,…,5) and then – as expected due to noise – gradually start returning satisfiability truth assignments that are no better than randomly picked solutions as the number of QAOA rounds are further increased.
This is an investigation of the limits of quantum circuit simulation with Schrodinger's formulation and low precision arithmetic. The goal is to estimate how much memory can be saved in simulations that involve random, maximally entangled quantum states. An arithmetic polar representation of BBB bits is defined for each quantum amplitude and a normalization procedure is developed to minimize rounding errors. Then a model is developed to quantify the cumulative errors on a circuit of QQQ qubits and GGG gates. Depending on which regime the circuit operates, the model yields explicit expressions for the maximum number of effective gates that can be simulated before rounding errors dominate the computation. The results are illustrated with random circuits and the quantum Fourier transform.
In Noisy Intermediate-Scale Quantum (NISQ) era devices, the output fidelity of a quantum circuit, under plausible assumptions, decreases exponentially with its size and depth. As such, optimizing these aspects becomes paramount. This is especially true for sparsely connected physical architectures where added swap gates are essential to meet device connectivity requirements. In this work, we adapt the Approximate Token Swapping (ATS) algorithm, traditionally used for routing qubits, to handle noisy settings by giving priority to specific swap sequences over others. This priority is partially determined by the error rates of the couplings in the qubit connectivity graph. We refer to this algorithm as Priority-ATS (PATS). We provide theoretical justification for PATS's effectiveness over the ATS algorithm and experimentally demonstrate its ability to improve the output state's fidelity. In our simulations, we employ a depolarizing channel to represent two-qubit gate errors, with each neighboring qubit pair having a distinct CNOT gate error rate. By applying realistic error rates, our results prominently highlight an enhanced output fidelity of the quantum circuit when PATS is employed.