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Russian Microelectronics

Efficient Implementation of Amplitude Form of Quantum Hashing Using State-of-the-Art Quantum Processors

I. Zinnatullin, Kamil Ravilevich Khadiev, Aliya Khadieva

Published Dec 1, 2023• 10 citations
Publisher

Abstract

Abstract Current physical limitations require quantum circuits to be transformed to fit the nearest-neighbor architecture. To achieve this, we usually use different techniques such as nearest-neighbor decomposition. In this work, we optimize quantum circuits implementing quantum hashing for quantum computers with specific architecture provided by IBM Q Platform. The optimization is done by reducing the number of used CNOT gates. We show how to choose the best position for the target qubit to get optimal circuits for the considered architectures.

DOI
10.1134/s1063739723600620

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Abstract Current physical limitations require quantum circuits to be transformed to fit the nearest-neighbor architecture. To achieve this, we usually use different techniques such as nearest-neighbor decomposition. In this work, we optimize quantum circuits implementing quantum hashing for quantum computers with specific architecture provided by IBM Q Platform. The optimization is done by reducing the number of used CNOT gates. We show how to choose the best position for the target qubit to get optimal circuits for the considered architectures.
Abstract In the paper, we consider quantum circuits for quantum fingerprinting (quantum hashing) and quantum Fourier transform (QFT) algorithms. Quantum fingerprinting (quantum hashing) is a well-known technique for comparing large objects using small images. The QFT algorithm is a very popular technique used in many algorithms. We present a generic method for constructing quantum circuits for these algorithms for quantum devices with restrictions. Many quantum devices (e.g., based on superconductors) have restrictions on applying two-qubit gates. The restrictions are presented by a qubit connectivity graph. Typically, researchers consider only the linear nearest neighbor (LNN) architecture, but current devices have more complex graphs. We present a method for arbitrary connected graphs that minimizes the number of CNOT gates in the circuit. The heuristic version of the method is fast enough and works with O ( n 6 ) time complexity, where n is the number of qubits. The certain version of the algorithm has an exponential time complexity that is O ( n 2 2 n ). We compare quantum circuits built by our algorithm with quantum circuits optimized for specific graphs that are Linear-nearest-neighbor (LNN) architecture, “sun” (a cycle with tails, presented by the 16-qubit IBMQ device) and “two joint suns” (two joint cycles with tails, presented by the 27-qubit IBMQ device). Our generic method gives similar results with a few more CNOT gates. At the same time, our method allows us to construct a circuit for arbitrary connected graphs.
We implement a quantum hashing algorithm which is based on a fingerprinting technique presented by Ambainis and Frievalds, 1988, on gate-based quantum computers. This algorithm is based on a quantum finite automaton for a unary language MODp\mathtt{MOD_p}MODp​, where $ \mathtt{MOD_p} = \{ a^{i \cdot p} \mid i \geq 0 \} $, for any prime number ppp. We consider 16-qubit and 27-qubit IBMQ computers with the special graphs of qubits representing nearest neighbor architecture that is not Linear Nearest Neighbor (LNN) one. We optimize quantum circuits for the quantum hashing algorithm with respect to minimizing the number of control operators as the most expensive ones. We apply the same approach for an optimized circuit implementation of Quantum Fourier Transform (QFT) operation on the aforementioned machines because QFT and hashing circuits have common parts.
One of the obstacles to the widespread adoption of quantum computing is the problem of efficient circuit synthesis. Current quantum hardware has limited connections between qubits, with each qubit connected to only a few others. This means that the circuit has to be transformed to accommodate this. In this paper, we present an algorithm that converts a circuit containing a sequence of CNOT gates into a form that is suitable for arbitrary quantum computer architectures. Although we demonstrate the algorithm only in the context of quantum fingerprinting, similar gate sequences are prevalent in quantum algorithms; for instance, they are present in the textbook quantum Fourier transform. We present a quantum circuit implementation of the quantum hashing algorithm (quantum fingerprinting algorithm) for a quantum device with restrictions on the application of two-qubit gates that are expressed as a qubit connectivity graph. As an example of usage of the technique, we apply it to quantum finite automata recognizing the unary MODp={aℓ:ℓ mod p=0}MOD_p=\{a^\ell: \ell \bmod p=0\}MODp​={aℓ:ℓmodp=0} language, and the EQp={aℓbr:ℓ≡r(modp)}EQ_p=\{a^\ell b^r: \ell \equiv r \pmod p\}EQp​={aℓbr:ℓ≡r(modp)} language. Given the enhancements that our algorithm provides~-- for instance, in one case it achieves a 16\%--17\% decrease in CNOT circuit cost~-- we believe it could also be useful in a broader quantum compilation context.
Abstract Current quantum computers are noisy intermediate-scale quantum (NISQ) devices. Execution of quantum algorithms, represented as quantum circuits in the quantum circuit model, on such hardware requires transformation of the original circuits to comply with the hardware’s physical constraints, a process known as transpilation. One of the main constraints is limited qubit connectivity. In this work, we present an algorithm that transforms a quantum hashing circuit to satisfy architectural connectivity constraints while minimizing the number of CNOT gates (CNOT cost). The considered algorithm constructs a mapping from logical qubits to physical qubits that minimizes the CNOT cost of the resulting circuit. We optimize circuits for IBM Quantum devices.
Currently, computing paradigm is ruled by the laws of classical physics and will continue till the dimensions of transistors reaches the size of atomic particles. Quantum computing (QC) is a new technology that employs laws of quantum mechanics to address issues such as irreversibility and power dissipation that are outside the scope of conventional computing models. QC offers a powerful stage for solving complex and compound problems like searching and number factoring. A critical task in utilizing quantum physics in many application fields is circuit design using reversible quantum gates. Unitary decomposition is a popular scheme for mapping quantum algorithms to any set of elementary quantum operations. Using decomposition techniques enables transformation of unitary matrices into fundamental quantum gates, which is critical for running algorithms on prevailing quantum computers. Any 3x3 reversible quantum gate can be decomposed into single-qubit rotation gates and two qubit CNOT gates. This paper is the first to present quantum implementations of FRSG1 and JTF1 gates into CNOT gates and single qubit U3 gates with different optimization levels on a platform provided by IBM. These gates are important in a variety of practical applications like Stochastic computing and parity generation circuits. In FRSG1 the implementation count of single qubit gates decreases by 56% and the count of two qubit gates by 15% after optimization, whereas in JTF1 gate the single qubit gate count reduces by 71% and the number of two qubit gates reduces by 41%.
Quantum computers are becoming a reality today due to the rapid progress made by researchers in the last years. In the process of building quantum computers, IBM has developed several versions-starting from 5-qubit architectures like IBM QX2 and IBM QX4 to larger 16- or 20-qubit architectures. These architectures support arbitrary rotations of a single qubit and a controlled negation (CNOT) involving two qubits. The two qubit operations come with added coupling-map restrictions that only allow specific physical qubits to be the control and target qubits of the operation. In order to execute a quantum circuit on the IBM QX architecture, CNOT gates must satisfy the so-called coupling constraints of the architecture. Previous works addressed this issue with the objective of reducing the number of gates and the circuit depth. However, in this article, we show that further improvements are possible. To this end, we present a general approach for further improving the number of gate operations and depth of the mapped circuit. The proposed approach encompasses the selection of physical qubits, determining initial and local permutations efficiently to obtain the final circuit mapped to the given IBM QX architecture. Through experiments, improvements are observed over existing methods in terms of the number of gates and circuit depth.