Superconducting quantum processors are among the most advanced quantum computing technologies. Systems based on these devices have enabled post-classical computation [1] and proof-of-concept execution of quantum-error-correction protocols [2]. While other qubit technologies employ naturally-occurring quantum mechanical degrees of freedom to encode information, those used by superconducting qubits are defined at the circuit level. Today’s state-of-the-art superconducting quantum processors use transmon qubits, but these are just one of a rich set of superconducting qubits; in considering the system-level optimization of a large-scale quantum computer, alternative qubit topologies may prove advantageous. Here, we consider cryo-CMOS control of a fluxonium qubit, one of the most promising of emerging superconducting qubits.
Superconducting quantum processors are among the most advanced quantum computing technologies. Systems based on these devices have enabled post-classical computation [1] and proof-of-concept execution of quantum-error-correction protocols [2]. While other qubit technologies employ naturally-occurring quantum mechanical degrees of freedom to encode information, those used by superconducting qubits are defined at the circuit level. Today’s state-of-the-art superconducting quantum processors use transmon qubits, but these are just one of a rich set of superconducting qubits; in considering the system-level optimization of a large-scale quantum computer, alternative qubit topologies may prove advantageous. Here, we consider cryo-CMOS control of a fluxonium qubit, one of the most promising of emerging superconducting qubits.
The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits can be implemented in many flavors, but they are fragile, and their state has a tendency to decay in time. To be usable for computation, qubits must be corrected in real time by a classical controller. The controller must also see that desired computations are executed. Today, the control of qubits is performed at room temperature (RT) by racks of instruments, while the qubits operate at several tens of milli-Kelvin. To ensure compactness and, eventually, scalability, we have proposed and implemented CMOS circuits designed to operate at a few degrees Kelvin. This makes complex thermalization circuits unnecessary, potentially enabling superconductive interconnects, which would enable virtually zero resistance and low thermal conductivity. Cryogenic CMOS, or cryo-CMOS, technology was chosen to achieve classical control due to its scalable nature and overall miniaturization opportunities. Cryo-CMOS circuits and systems need to be carefully designed to ensure strict power budgets, while achieving quite advanced specifications in terms of noise and bandwidth. We review the requirements of a classical controller and cryo-CMOS circuits and systems developed for spin qubits in our lab. Results and perspectives are presented with a discussion about a road map for the future.
Scaling up to a full-scale multi-qubit processor adds complexity to the control signals input requirements which can be addressed by the use of specially designed cryogenic interface circuits. In this paper, we discuss the use of cryogenic classical electronics for control of a fluxonium artificial atom. In recent years, fluxonium has gained notoriety among the superconducting qubit community for exceptionally long coherence times and large anharmonicity - both highly desirable properties when designing the next generation of qubit systems. The feasibility of controlling a fluxonium based quantum processors with a compact control system ultimately enables a highly scalable system; however, the cryogenic environment poses very strict requirements on electronics. Many trade-offs arise in terms of noise, power consumption, and circuit complexity. Addressing these requires comprehensive simulations that account for the physics of fluxonium qubits and the potential impact of control circuits on their performance. This paper focuses on the models and specification derivation for qubit control and explores constraints in fluxonium-based system design. The models and specifications derived enable the design of optimal control circuits targeted for scalable fluxonium quantum processors.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
Future generations of quantum computers are expected to operate in a paradigm where multi-qubit devices will predominantly perform circuits to support quantum error correction. Highly integrated cryogenic electronics are a key enabling technology to support the control of the large numbers of physical qubits that will be required in this fault-tolerant, error-corrected regime. Here, we describe our perspectives on cryoelectronics-driven qubit control architectures, and will then describe an implementation of a scalable, low-power, cryogenic qubit state controller that includes a domain-specific processor and a SSB upconversion I/Q-mixer-based RF AWG. We will also describe an FPGA-based emulation platform that is able to closely reproduce the system intention, and which was used to verify different aspects of the ASIC system design in in situ transmon qubit control experiments.
Abstract Realizing a practically useful superconducting quantum computer will require a dramatic scale-up of quantum control electronics to meet the growth in required qubit counts. Conventional rack-based room-temperature control electronics impose severe constraints on wiring density, cost, and system footprint, creating a barrier to large-scale and fault-tolerant quantum computing. Here we demonstrate a hybrid quantum control architecture that combines cryogenic complementary metal-oxide semiconductor (cryo‑CMOS) application-specific integrated circuits (ASICs) for two‑qubit flux control with room‑temperature radio‑frequency electronics for single‑qubit control and readout. The resulting system achieves high density and scalable quantum control without compromising two‑qubit gate fidelity. Deployed on a 156‑qubit quantum processor, the cryo-CMOS subsystem achieves two‑qubit gate errors at the {10}^{-3} level, with a best randomized benchmarking error per gate of 8.4\times{10}^{-4}, stable operation over multi‑day timescales, and no measurable performance degradation as we increase the temperature of the cryo-CMOS ASICs from 7 to 20 K. Thermal analysis identifies cryo-CMOS chip operation near 20 K as a favorable regime, enabling efficient cooling of a large number of channels per cryostat. Compared against rack‑based flux-control, the cryo-CMOS subsystem achieves statistically indistinguishable two-qubit gate fidelities under matched gate settings and enables a tenfold improvement in system spatial footprint. These results establish cryo‑CMOS flux control as a practical and scalable foundation for large‑scale and fault-tolerant superconducting quantum systems.