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International Conference on Consumer Electronics

Digital Annealing Engine for High-speed Solving of Constrained Binary Quadratic Problems on Multiple GPUs

Kentaro Katayama, Noboru Yoneoka, Kouichi Kanda, Hirotaka Tamura, Hiroshi Nakayama, Yasuhiro Watanabe

Published Jan 6, 2024• 5 citations
Publisher

Abstract

This paper presents a digital annealing engine capable of high-speed solving the Binary Quadratic Programming Problem (BQP) with equality and inequality constraints. While many Quadratic Unconstrained Binary Optimization (QUBO) solvers have been developed for combinatorial optimization problems, they are specialized for “unconstrained” BQP and struggle to solve “constrained” BQP at high speed. To address this issue, we developed a digital annealing engine on GPUs that leverages constraints to narrow the search space and directly evaluates inequality violations during Markov Chain Monte Carlo based searches. We evaluated the performance of the Digital Annealer (DA) system with the developed engine on benchmark problems with one-hot (a type of equality constraint) and inequality constraints. The results showed that the developed DA system achieved superior solving performance compared to the previous generation of DA. It also showed comparable performance to state-of-the-art dedicated solvers. Our results suggest that this digital annealing engine is a promising solution for high-speed solving constrained BQP.

DOI
10.1109/icce59016.2024.10444391

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A Digital Annealer (DA) is a dedicated architecture for high-speed solving of combinatorial optimization problems mapped to an Ising model. With fully coupled bit connectivity and high coupling resolution as a major feature, it can be used to express a wide variety of combinatorial optimization problems. The DA uses Markov Chain Monte Carlo as a basic search mechanism, accelerated by the hardware implementation of multiple speed-enhancement techniques such as parallel search, escape from a local solution, and replica exchange. It is currently being offered as a cloud service using a second-generation chip operating on a scale of 8,192 bits. This paper presents an overview of the DA, its performance against benchmarks, and application examples.
Annealers leverage quadratic unconstrained binary optimization (QUBO) formulas to address combinatorial optimization problems (COPs) and have shown potential to outperform classical computers. This paper examines three prominent types of annealers: quantum, digital, and GPU annealers. Quantum annealers (QAs) are exemplified by the D-Wave Advantage, which relies on the quantum tunneling phenomenon to rapidly locate the minimum-energy system state corresponding to the optimal solution to a COP. Digital annealers (DAs) are typified by the Fujitsu Digital Annealing Unit (DAU), which is based on a quantum-inspired digital architecture to perform parallel and real-time optimization calculations to solve a COP. GPU annealers (GPUAs) are exemplified by the Compal Quantix solver, which harnesses graphics processing units (GPUs) to conduct the diverse adaptive bulk search for the optimal COP solution. This paper first provides an introductory overview of the QA, DA, and GPUA, and then proceeds to benchmark their performance on solving various well-known COPs such as the subset sum, maximum cut, vertex cover, 0/1 knapsack, graph coloring, Hamiltonian cycle, traveling salesperson, and job-shop scheduling problems. Their performance is also compared with that of state-of-the-art algorithms running on classical computers. Through comprehensive performance benchmarks in terms of the solution quality and the execution time, we identify the strengths and weaknesses of each annealer. In addition, we also provide recommendations to improve the performance of each annealer. Specifically, we recommend using the genetic algorithm, the improved particle swarm optimization algorithm, and the ant colony optimization algorithm in all annealers, using quantum pausing, quenching, and reverse annealing in the QA, using built-in separated penalty terms, one-way/two-way one-hot constraints, and linear inequality constraints in the DA, and implementing some parallel algorithms in the GPUA for performance improvement.