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International Symposium on Innovative Approaches in Smart Technologies (ISAS)

Design of Majority Decoded Codes and Decoding Algorithm Based on Error Propagation Analysis

Zhuldyz Sailau kyzy, Дина Сатыбалдина, Г. Т. Даненова, Махаббат Мейрамовна Коккоз, Нурлан Наркенович Ташатов

Published Nov 23, 2023• 1 citation
Publisher

Abstract

Modern digital communication systems are subject to very strict requirements for the reliability of information transmission. To ensure these requirements the methods of error-correction coding are applied. In this paper, we propose a method and software to design majority decoding codes and multi-threshold decoders to reduce the effect of decoding error propagation. Simulation and simulation results show that iterative multi-threshold decoding with selected parameters allows for near-optimal decoding of self-orthogonal codes with linear implementation complexity, demonstrating good error correction ability at low noise levels. The proposed codes and corresponding decoding circuits provide gains of tenths of a decibel when the noise level increases.

DOI
10.1109/isas60782.2023.10391304

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Modern digital communication systems are subject to very strict requirements for the reliability of information transmission. To ensure these requirements the methods of error-correction coding are applied. In this paper, we propose a method and software to design majority decoding codes and multi-threshold decoders to reduce the effect of decoding error propagation. Simulation and simulation results show that iterative multi-threshold decoding with selected parameters allows for near-optimal decoding of self-orthogonal codes with linear implementation complexity, demonstrating good error correction ability at low noise levels. The proposed codes and corresponding decoding circuits provide gains of tenths of a decibel when the noise level increases.
Error correctiong codes (ECC) are widly used in applications to correct errors in data transmission over unreliable or noisy communication channels. Recently, two kinds of promising codes attracted lots of research interest because they provide excellent error correction performance. One is non-binary LDPC codes, and the other is polar codes. This dissertation focuses on efficient decoding algorithms and decoder design for thesetwo types of codes.Non-binary low-density parity-check (LDPC) codes have some advantages over their binary counterparts, but unfortunately their decoding complexity is a significant challenge. The iterative hard- and soft-reliability based majority-logic decoding algorithms are attractive for non-binary LDPC codes, since they involve only finite field additions and multiplications as well as integer operations and hence have significantly lower complexity than other algorithms. We propose two improvements to the majority-logic decoding algorithms. Instead of the accumulation of reliability information in the ex-isting majority-logic decoding algorithms, our first improvement is a new reliability information update. The new update not only results in better error performance and fewer iterations on average, but also further reduces computational complexity. Since existing majority-logic decoding algorithms tend to have a high error floor for codes whose parity check matrices have low column weights, our second improvement is a re-selection scheme, which leads to much lower error floors, at the expense of more finite field operations and integer operations, by identifying periodic points, re-selectingintermediate hard decisions, and changing reliability information.Polar codes are of great interests because they provably achieve the symmetric capacity of discrete memoryless channels with arbitrary input alphabet sizes an explicit construction. Most existing decoding algorithms of polar codes are based on bit-wise hard or soft decisions. We propose symbol-decision successive cancellation (SC) and successive cancellation list (SCL) decoders for polar codes, which use symbol-wise hard or soft decisions for higher throughput or better error performance. Then wepropose to use a recursive channel combination to calculate symbol-wise channel transition probabilities, which lead to symbol decisions. Our proposed recursive channel combination has lower complexity than simply combining bit-wise channel transition probabilities. The similarity between our proposed method and Arıkan's channel transformations also helps to share hardware resources between calculating bit- and symbol-wise channel transition probabilities. To reduce the complexity of the list pruning, atwo-stage list pruning network is proposed to provide a trade-off between the error performance and the complexity of the symbol-decision SCL decoder. Since memory is a significant part of SCL decoders, we also propose a pre-computation memory-saving technique to reduce memory requirement of an SCL decoder.To reduce the complexity of the recursive channel combination further, we propose an approximate ML (AML) decoding unit for SCL decoders. In particular, we investigate the distribution of frozen bits of polar codes designed for both the binary erasure and additive white Gaussian noise channels, and take advantage of the distribution to reduce the complexity of the AML decoding unit, improving the throughput-area efficiency of SCL decoders.Furthermore, to adapt to variable throughput or latency requirements which exist widely in current communication applications, a multi-mode SCL decoder with variable list sizes and parallelism is proposed. If high throughput or small latency is required, the decoder decodes multiple received words in parallel with a small list size. However, if error performance is of higher priority, the multi-mode decoder switches to a serialmode with a bigger list size. Therefore, the multi-mode SCL decoder provides a flexible tradeoff between latency, throughput and error performance at the expense of small overhead.
In the information theory , the non- binary low density parity check  (NB-LDPC) code is a  linear error correcting code , a method of transmitting message over a  noisy transmission channel. LDPCcodes are  capacity-approaching codes , which  means  that  practical constructions exist  that allow the noise threshold to be set very close to the theoretical maximum for a symmetric memory less channel.Using iterative  belief propagation techniques, NB-LDPC codes can be decoded in time linear to their block length. Non-binary low-density parity-check codes can achieve higher performance than their binary counterparts. Recently, two algorithms were developed for decoding NB-LDPC codes: iterative hard reliability-based majority-logic decoding (IHRB-MLGD) and iterative soft reliability-based majority-logic decoding (ISRB-MLGD has better performance-complexity tradeoffs than previous algorithms. This paper first proposes message-passing in such a way that we can reduce the memory consumption to a greater extent at the same time there should not be performance loss. By using enhanced iterative reliability-based majority-logic decoding algorithms we can achieve effective complexity-performance and noise free design. Compared to previous designs, our proposed decoders have at least tens of times lower complexity with moderate coding gain loss.
A reliability-based iterative majority-logic decoding algorithm for regular low-density parity-check (LDPC) codes was recently proposed by Huang et al. In this paper we present an improved version of that algorithm by introducing a different reliability measure for each check-sum of the parity-check matrix, and taking it into account in the computation of the extrinsic information that is used to update the reliability measure of each received bit in each iteration. Some simulations results are given, which show that the new algorithm, while requiring very little additional computational complexity, not only achieves a considerable error performance gain over the standard one, but also, importantly, outperforms the iterative decoding based on belief propagation (IDBP), especially for short and medium block length finite-geometry (FG) LDPC codes.
In modern data communication system Error Detection and Correction has great practical importance to maintain the data integrity across the noisy channel. To deal with this challenge, the theory of Error detection and correction need to get one's precise attention. To retrieve the original data, an efficient process is required. A class of error correcting codes which performs iterative decoding inside a graph is considered which can provide a good approximation. In this context Low Density Parity Check (LDPC) code comes with an excellent error correction performance. In this paper architecture and algorithms for Error Detection and Correction method based on LDPC code is proposed. Also, a simulator for the proposed algorithms is designed and tested successfully.
The work of this PhD thesis is dedicated to the design of graph-based systems and signal processing algorithms on graphs which improve error correction and multi-user interference cancellation performance of modern communication systems. New ensembles of low-density parity-check codes based on connecting coupled graphs ensembles are studied and analyzed. We propose a technique to analyze the thresholds of the resulting connected ensembles and formulate new ensemble design guidelines. We propose a new encoding algorithm for staircase codes which lends itself to improved low-power hardware implementation for high-throughput optical communication systems. An analysis of the decoding process of staircase codes is proposed explaining the mis-correction properties of these codes. Finally, we propose and study a window-based detection/decoding algorithm for coupled information transmission multi-user communication system and propose a novel design of a self-coupled random-access communication system.