The limited qubit resources of current quantum processing units (QPUs), together with their susceptibility to operational imperfections, environmental noise, and error propagation, not only degrade computational fidelity but also constrain the scalability required for utility-scale quantum computing. Consequently, the transition from monolithic architectures to distributed quantum computing (DQC), supported by distributed quantum error-correcting codes (QECCs), is emerging as a promising paradigm for large-scale fault-tolerant quantum computing (FTQC). This transition represents a full-stack challenge that requires coordinated advances in quantum architecture, fault-tolerant gate operations, and classical–quantum co-processing and control. In this paper, we review the theoretical foundations and practical realization of large-scale FTQC. We first explore major families of QECCs, including topological, qLDPC, subsystem, and dynamical codes, with emphasis on code construction, syndrome extraction, and decoding. We then review the implementation of fault-tolerant universal gate sets at the physical and logical levels, followed by entanglement generation, distribution, and purification for distributed architectures. Finally, we outline open challenges and future research directions in theory, architecture, and implementation, highlighting the role of distributed fault-tolerant designs in next-generation utility-scale quantum computing.The limited qubit resources of current quantum processing units (QPUs), together with their susceptibility to operational imperfections, environmental noise, and error propagation, not only degrade computational fidelity but also constrain the scalability required for utility-scale quantum computing. Consequently, the transition from monolithic architectures to distributed quantum computing (DQC), supported by distributed quantum error-correcting codes (QECCs), is emerging as a promising paradigm for large-scale fault-tolerant quantum computing (FTQC). This transition represents a full-stack challenge that requires coordinated advances in quantum architecture, fault-tolerant gate operations, and classical–quantum co-processing and control. In this paper, we review the theoretical foundations and practical realization of large-scale FTQC. We first explore major families of QECCs, including topological, qLDPC, subsystem, and dynamical codes, with emphasis on code construction, syndrome extraction, and decoding. We then review the implementation of fault-tolerant universal gate sets at the physical and logical levels, followed by entanglement generation, distribution, and purification for distributed architectures. Finally, we outline open challenges and future research directions in theory, architecture, and implementation, highlighting the role of distributed fault-tolerant designs in next-generation utility-scale quantum computing.

EntropyOct 23, 20260 citations

Universal fault-tolerant quantum computing with stabilizer codes

Paul Webster, Michael Vasmer, Thomas R. Scruby +1 more

The quantum logic gates used in the design of a quantum computer should be both universal, meaning arbitrary quantum computations can be performed, and fault-tolerant, meaning the gates keep errors from cascading out of control. A number of no-go theorems constrain the ways in which a set of fault-tolerant logic gates can be universal. These theorems are very restrictive, and conventional wisdom holds that a universal fault-tolerant logic gate set cannot be implemented natively, requiring us to use costly distillation procedures for quantum computation. Here, we present a general framework for universal fault-tolerant logic with stabilizer codes, together with a no-go theorem that reveals the very broad conditions constraining such gate sets. Our theorem applies to a wide range of stabilizer code families, including concatenated codes and conventional topological stabilizer codes such as the surface code. The broad applicability of our no-go theorem provides a new perspective on how the constraints on universal fault-tolerant gate sets can be overcome. In particular, we show how nonunitary implementations of logic gates provide a general approach to circumvent the no-go theorem, and we present a rich landscape of constructions for logic gate sets that are both universal and fault-tolerant. That is, rather than restricting what is possible, our no-go theorem provides a signpost to guide us to new, efficient architectures for fault-tolerant quantum computing.The quantum logic gates used in the design of a quantum computer should be both universal, meaning arbitrary quantum computations can be performed, and fault-tolerant, meaning the gates keep errors from cascading out of control. A number of no-go theorems constrain the ways in which a set of fault-tolerant logic gates can be universal. These theorems are very restrictive, and conventional wisdom holds that a universal fault-tolerant logic gate set cannot be implemented natively, requiring us to use costly distillation procedures for quantum computation. Here, we present a general framework for universal fault-tolerant logic with stabilizer codes, together with a no-go theorem that reveals the very broad conditions constraining such gate sets. Our theorem applies to a wide range of stabilizer code families, including concatenated codes and conventional topological stabilizer codes such as the surface code. The broad applicability of our no-go theorem provides a new perspective on how the constraints on universal fault-tolerant gate sets can be overcome. In particular, we show how nonunitary implementations of logic gates provide a general approach to circumvent the no-go theorem, and we present a rich landscape of constructions for logic gate sets that are both universal and fault-tolerant. That is, rather than restricting what is possible, our no-go theorem provides a signpost to guide us to new, efficient architectures for fault-tolerant quantum computing.

arXiv:2012.05260Physical Review ResearchFeb 4, 202228 citations

Fast universal quantum gate above the fault-tolerance threshold in silicon

Akito Noiri, Kenta Takeda, Takashi Nakajima +4 more

arXiv:2108.02626NatureJan 19, 2022471 citations

A Topologically Fault-Tolerant Quantum Computer with Four Dimensional Geometric Codes

David Aasen, Matthew B. Hastings, Vadym Kliuchnikov +8 more

Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of $\sim 0.01$ , and a logical error rate of $\sim 10^{-6}$ per logical qubit per round of error correction at $10^{-3}$ physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of $\sim 0.01$, and a logical error rate of $\sim 10^{-6}$ per logical qubit per round of error correction at $10^{-3}$ physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.

arXiv:2506.15130Jun 18, 20250 citations

The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes

Paul Webster, Lucas Berent, Omprakash Chandra +5 more

The realisation of utility-scale quantum computing inextricably depends on the design of practical, low-overhead fault-tolerant architectures. We introduce the Pinnacle Architecture, which uses quantum low-density parity check (QLDPC) codes to allow for universal, fault-tolerant quantum computation with a spacetime overhead significantly smaller than that of any competing architecture. With this architecture, we show that 2048-bit RSA integers can be factored with fewer than one hundred thousand physical qubits, given a physical error rate of $10^{-3}$ , code cycle time of $1$ microsecond and a reaction time of $10$ microseconds. We thereby demonstrate the feasibility of utility-scale quantum computing with an order of magnitude fewer physical qubits than has previously been believed necessary.The realisation of utility-scale quantum computing inextricably depends on the design of practical, low-overhead fault-tolerant architectures. We introduce the Pinnacle Architecture, which uses quantum low-density parity check (QLDPC) codes to allow for universal, fault-tolerant quantum computation with a spacetime overhead significantly smaller than that of any competing architecture. With this architecture, we show that 2048-bit RSA integers can be factored with fewer than one hundred thousand physical qubits, given a physical error rate of $10^{-3}$, code cycle time of $1$ microsecond and a reaction time of $10$ microseconds. We thereby demonstrate the feasibility of utility-scale quantum computing with an order of magnitude fewer physical qubits than has previously been believed necessary.

quant-pharXiv:2602.11457Feb 13, 20263 citations

\sim 0.01

, and a logical error rate of

\sim 10^{-6}

per logical qubit per round of error correction at

10^{-3}

physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.

10^{-3}

, code cycle time of

1

microsecond and a reaction time of

10

microseconds. We thereby demonstrate the feasibility of utility-scale quantum computing with an order of magnitude fewer physical qubits than has previously been believed necessary.