In recent times, quantum computing has been an emerging domain and has raised the interests of researchers and engineers because of its adulating potentiality to establish exponentially rapid and aligned computations compared to classical computing. Placing qubits of the underlying quantum gates at adjacent locations poses the most conspicuous hurdle towards these circuits to satiate their adjacent neighbor condition. Contingent on this fact, the heuristic methodology is propounded by us in this paper so that it can perceive nearest neighbor circuits in a two-dimensional cell configuration. After evaluating the implemented approach over a vast span of benchmark functions, we have entrenched the best results in this paper. We have compared the effectiveness of the proposed approach with previous research works. Through experimental outcomes, a substantial improvement of about 45% and 70% over already existing 1D research works and 16%, 8.9%, and 11% over already-existing 2D research works have been attained.
In recent times, quantum computing has been an emerging domain and has raised the interests of researchers and engineers because of its adulating potentiality to establish exponentially rapid and aligned computations compared to classical computing. Placing qubits of the underlying quantum gates at adjacent locations poses the most conspicuous hurdle towards these circuits to satiate their adjacent neighbor condition. Contingent on this fact, the heuristic methodology is propounded by us in this paper so that it can perceive nearest neighbor circuits in a two-dimensional cell configuration. After evaluating the implemented approach over a vast span of benchmark functions, we have entrenched the best results in this paper. We have compared the effectiveness of the proposed approach with previous research works. Through experimental outcomes, a substantial improvement of about 45% and 70% over already existing 1D research works and 16%, 8.9%, and 11% over already-existing 2D research works have been attained.
In the last few years, quantum computing has gained the attention of the researchers due to its ability to perform parallel and exponentially faster computation over classical computing. One of the prominent challenges for quantum circuits is to satisfy the nearest neighbor (NN) condition, i.e., the qubits of the computing gate must be placed adjacent. Based on this fact, here, in this paper, we have proposed a heuristic synthesis workflow to realize NN circuits in 2D grid configuration. The implemented approach has been evaluated over a broad range of benchmark circuits and we have reported the best results. To validate the efficiency of the stated approach, we have compared it with the previously reported works, an average improvement of 15.94%, 8.89% and 10.98% are obtained over the existing 2D works, and 44.72% and 70.35% are obtained over existing 1D works, respectively.
In the last few years, tremendous improvement in the field of quantum computing has been witnessed. Although quantum technologies such as ion-trap, NMR, quantum dots have emerged as the promising platforms for implementing quantum circuits but these technologies have faced several design issues. One such important design problem is the nearest neighbor condition, which requires the qubits to interact with adjacent neighbors. This problem can be addressed by adding SWAP gates in the circuit. By doing so, the overhead in the circuit increases thus NN designs with minimum number of SWAP gates need to be developed. Focusing on this, here, in this work, we introduce a heuristic design method for efficient NN realization of quantum circuits in 2D architecture. Our NN transformation process is carried out in two phases, where initially in the first phase, the input circuit is mapped to 2D configuration using a qubit placement strategy and then in the second phase NN designs are obtained through SWAP gate insertion. At the end, the design algorithm has been evaluated over a large set of benchmark functions and the results are compared with some of the existing works. From this comparison, it is seen that our proposed method performs better than the reported works.
Advancements in quantum circuit manufacturing methodologies have exhibited substantial progress over the past decade. One persisting challenge and technological constraint in this domain is the Nearest Neighbour (NN) implementation, necessitating physical qubits to be adjacent. One of the promising solutions to addressing this nearest neighbor problem was recognized, revealing that optimizing the grid selection could lead to a substantial reduction in the conversion cost for nearest neighbors and a more efficient utilization of SWAP operations. We have employed a mapping scheme to situate them effectively within suitable 2D grids. The conversion of quantum circuits into NN-compatible designs demonstrates promising outcomes, surpassing heuristic and meta- heuristic techniques. Through experimental evaluations and comparisons with state-of-the-art methodologies, we have identified significant enhancements. Experimental results exhibit notable breakthroughs, showcasing advancements of approximately 7.63%, 11.76%, 20.5%, 25.46% and 11.56% over existing 2D works. Furthermore, considerable improvements of 16.87% and 5.46% have been registered over large 2D benchmarks and meta-heuristic approaches, respectively.
Design and synthesis of quantum circuits have gained huge momentum during the last few years. With various physical constraint sone of the major issues is in making quantum circuits nearest neighbor complaint. The existing one and two dimensional architectures for the placement of qubits does not scale well for larger circuits. The situation thus demands for a faster approach to solve the problem. To make a quantum circuit nearest neighbor compliant, SWAP gates are inserted in the quantum gate circuit to bring the interacting qubits of a gate adjacent. We have proposed a faster method with a simple yet effective algorithm to minimize the number of SWAP gates for adjacent interactions. The time required for processing does not exceed one second even for larger benchmark circuits. The proposed method is found to reduce the number of SWAP gates on an average by 9.5% compared to the best results in previous works on 2D architectures, and by 45.7% compared to the best results on 1D architecture.
Ensuring nearest neighbor compliance of quantum circuits by inserting SWAP gates has heavily been considered in the past. Here, quantum gates are considered which work on non-adjacent qubits. SWAP gates are applied in order to “move” these qubits onto adjacent positions. However, a decision how exactly the SWAPs are “moved” has mainly been made without considering the effect a “movement” of qubits may have on the remaining circuit. In this work, we propose a methodology for nearest neighbor optimization which addresses this problem by means of a look-ahead scheme. To this end, two representative implementations are presented and discussed in detail. Experimental evaluations show that, in the best case, reductions in the number of SWAP gates of 56% (compared to the state-of-the-art methods) can be achieved following the proposed methodology.
Since decades, quantum computing has received tremendous attention among the researchers due to its dominance over classical computing. But simultaneously it has faced some design challenges and implementation constraints in this long run. One such constraint to build quantum circuits is to satisfy the so-called Nearest Neighbor (NN) property in the implemented circuits. Using SWAP gates, this constraint can be satisfied. But this leads to another design issue, namely how to determine such NN designs with a minimum use of SWAP gates. In way to further explore this area, in this work, we propose a heuristic approach for efficient NN complaint representation of quantum circuits in 2D space. The developed technique is segmented in three stages - qubit selection, qubit placement and SWAP gate insertion. The stated approach has been tested over a wide spectrum of benchmarks and reductions in cost parameters are observed. Improvement of more than 17%, 3% over 2D designs and 35%, 22% over 1D designs on SWAP count and quantum cost can be reported, respectively.