Quantum circuit simulations are applied in more and more circumstances as the quantum computing community becomes broader. It helps researchers to evaluate the quantum algorithms and relieve the burden of limited quantum computing resources. However, most of the state-of-the-art quantum simulators utilizes either CPU or GPU to store and calculate the state vector, which results in resources stravation. Morever, the mamximum number of qubits supported by simulator is bounded by the memory, since the memory utilization increases exponentially with the number of qubits. In this study, we leverage Heterogeneous computing to utilize both CPU and GPU to store and update state vectors. We also integrate lossy data compression to reduce memory requirements. Specifically, we develop a heterogeous framework that has a dynamic scheduler to fully utilize the computing resources. We apply lossy compression to chunked state vector to make the maximum number of qubits higher than the regular simulators, the compression also benifits the data movement between CPU and GPU.
Quantum circuit simulations are applied in more and more circumstances as the quantum computing community becomes broader. It helps researchers to evaluate the quantum algorithms and relieve the burden of limited quantum computing resources. However, most of the state-of-the-art quantum simulators utilizes either CPU or GPU to store and calculate the state vector, which results in resources stravation. Morever, the mamximum number of qubits supported by simulator is bounded by the memory, since the memory utilization increases exponentially with the number of qubits. In this study, we leverage Heterogeneous computing to utilize both CPU and GPU to store and update state vectors. We also integrate lossy data compression to reduce memory requirements. Specifically, we develop a heterogeous framework that has a dynamic scheduler to fully utilize the computing resources. We apply lossy compression to chunked state vector to make the maximum number of qubits higher than the regular simulators, the compression also benifits the data movement between CPU and GPU.
Full-state quantum circuit simulation requires exponentially increased memory size to store the state vector as the number of qubits scales, presenting significant limitations in classical computing systems. Our paper introduces BMQSim, a novel state vector quantum simulation framework that employs lossy compression to address the memory constraints on graphics processing unit (GPU) machines. BMQSim effectively tackles four major challenges for state-vector simulation with compression: frequent compression/decompression, high memory movement overhead, lack of dedicated error control, and unpredictable memory space requirements. Our work proposes an innovative strategy of circuit partitioning to significantly reduce the frequency of compression occurrences. We introduce a pipeline that seamlessly integrates compression with data movement while concealing its overhead. Additionally, BMQSim incorporates the first GPU-based lossy compression technique with point-wise error control. Furthermore, BMQSim features a two-level memory management system, ensuring efficient and stable execution. Our evaluations demonstrate that BMQSim can simulate the same circuit with over 10 times less memory usage on average, achieving fidelity over 0.99 and maintaining comparable simulation time to other state-of-the-art simulators.
Quantum circuit simulations are critical for evaluating quantum algorithms and machines. However, the number of state amplitudes required for full simulation increases exponentially with the number of qubits. In this study, we leverage data compression to reduce memory requirements, trading computation time and fidelity for memory space. Specifically, we develop a hybrid solution by combining the lossless compression and our tailored lossy compression method with adaptive error bounds at each timestep of the simulation. Our approach optimizes for compression speed and makes sure that errors due to lossy compression are uncorrelated, an important property for comparing simulation output with physical machines. Experiments show that our approach reduces the memory requirement of simulating the 61-qubit Grover's search algorithm from 32 exabytes to 768 terabytes of memory on Argonne's Theta supercomputer using 4,096 nodes. The results suggest that our techniques can increase the simulation size by 2~16 qubits for general quantum circuits.
Quantum circuit simulation at scale demands high-performance computing (HPC) frameworks capable of distributing exponentially growing state vectors and tensor networks across heterogeneous compute clusters. As quantum algorithm development accelerates and circuits approach 50-100 qubits in practical workloads, simulation bottlenecks shift from single-node memory constraints to inter-node communication overhead, GPU memory bandwidth, and framework-level scheduling inefficiencies. This paper proposes the HPC Quantum Simulation Framework Benchmark (HQSFB), a systematic evaluation of five leading quantum simulation frameworks -- Qiskit Aer, Cirq on GCP, cuQuantum (NVIDIA), QuEST, and Intel Quantum Simulator (IQS) -- across six HPC deployment configurations spanning single-GPU workstations to 512-GPU supercomputer partitions. HQSFB introduces the Framework Efficiency Score (FES) combining simulation throughput, GPU utilisation, inter-node communication overhead, and memory scaling efficiency. Key results: cuQuantum achieves the highest FES (0.924) with 94.2% GPU utilisation and 42x speedup over CPU baseline at 512 GPUs; QuEST achieves the best memory scaling efficiency (0.962) for distributed statevector simulation; Qiskit Aer provides the broadest circuit compatibility with FES = 0.842. The framework provides HPC configuration guidance and an open benchmark suite for quantum simulation infrastructure planning.
Large-scale quantum circuit simulation on high-performance computing (HPC) systems is crucial for developing and verifying quantum algorithms to overcome the limitations of current noisy quantum computers. However, existing simulators face scalability bottlenecks due to memory limits and communication overhead. Many state-of-the-art approaches rely on static circuit partitioning, which makes it difficult to address the exponential growth in problem size as the number of qubits increases. To overcome these challenges, we present ScaleQsim, a highly scalable quantum circuit simulation framework for large-scale HPC systems. ScaleQsim focuses on providing a unified representation of the full qubit state, yet provides scalability through efficient synchronization and communication. ScaleQsim adopts a novel full state vector partitioning strategy that evenly distributes the full state vector across multiple nodes and GPUs. This distributed structure enables efficient parallel gate execution without costly synchronization, and ScaleQsim applies adaptive kernel configuration, which adjusts execution parameters based on GPU resources and task granularity to enhance simulation efficiency. Our evaluation on the Perlmutter supercomputer with up to 512 GPUs demonstrates that ScaleQsim simulates quantum circuits with up to 42 qubits and outperforms state-of-the-art simulators by up to 77.40× across various quantum circuits.
High-performance quantum circuit simulation in a classic HPC is still imperative in the NISQ era. Observing that the major obstacle of scalable state-vector quantum simulation arises from the massively fine-grained irregular data-exchange with remote nodes, in this paper we present SV-Sim to apply the PGAS-based communication models (i.e., direct peer access for intra-node CPUs/GPUs and SHMEM for inter-node CPU/GPU clusters) for efficient generalpurpose quantum circuit simulation. Through an orchestrated design based on device functional pointer, SV-Sim is able to abstract various quantum gates across multiple heterogeneous backends, including IBM/Intel/AMD CPUs, NVIDIA/AMD GPUs, and Intel Xeon Phi, in a unified framework, but still asserting outstanding performance and tractable interface to higher-level quantum programming environments, such as IBM Qiskit, Microsoft Q# and Google Cirq. Circumventing the obstacle from the lack of polymorphism in GPUs and leveraging the device-initiated one-sided communication, SV-Sim can process circuit that are dynamically generated in Python using a single GPU/CPU kernel without the need of expensive JIT or runtime parsing, significantly simplifying the programming complexity and improving performance for QC simulation. This is especially appealing for the variational quantum algorithms given the circuits are synthesized online per iteration. Evaluations on the latest NVIDIA DGX-A100, V100-DGX-2, ALCF Theta, OLCF Spock, and OLCF Summit HPCs show that SV-Sim can deliver scalable performance on various state-of-the-art HPC platforms, offering a useful tool for quantum algorithm validation and verification. SV-Sim has been released at http://github.com/pnnl/sv-sim. A version specially tweaked for Q#/QDK is also provided.
Quantum computing simulation on a classical computer is difficult due to the exponential runtime and memory overhead. Previous work addresses the difficulty by utilizing multiple Graphical Processing Units (GPUs) and multi-node computers. GPUs are efficient for handling runtime issues but have limited total accessible memory space. Meanwhile, the memory of a multi-node computer can be scaled to the petabytes order, but its bandwidth for access from host computers (CPUs) is narrow. To simultaneously accelerate simulation and enlarge the total memory space, we propose a heterogeneous parallelization approach by combining GPUs and CPUs. Our simulator allocates memory to the GPUs first, and then to the CPUs. It thus accelerates simulation by using the full capabilities of the GPUs if memory for the simulation fits in the GPUs on a cluster. Allocating memory to the CPUs reduces benefits of the GPUs but enlarges the capacity of qubits in the simulation. In such case, it can exploit the memory of the GPUs to add one more qubit in the simulation if the size of memory in a node is the power of two (such as 512GB). We show empirical performance evaluations of our simulator in a distributed environment of POWER9.