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International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)

FPGA Implementation of Recurrent Neural Network-Based Polar Decoder

Ziad Ibrahim, Yasmine A. H. Fahmy

Published Dec 19, 2022• 0 citations
Publisher

Abstract

Polar codes are part of the 5G technology enablers as they nearly achieve memoryless channels capacity. Recently, many researchers explored Machine-learning (ML) techniques to increase the effectiveness of polar codes decoders. Recurrent Neural Network Belief Propagation decoders (RNN-BP) demonstrated superior efficiency in fewer cycles than standard Polar decoders, as traditional Belief propagation decoders performed poorly throughout a limited number of iterations. In this paper, we present the first implementation of the RNN-BP on Field Programmable Gate Arrays (FPGA). Two implementations are presented in this paper. The first one uses a single processing unit, and the second one is enhanced by multiple processing units with a pipeline register. The multiple processing units’ design of RNN-BP shows much higher throughput which is 17x of belief propagation decoder implementation and 3x of the Soft-output CANcellation (SCAN) decoder implementation. We also achieved better BER than the two mentioned implementations 7. 08x than the original BP and 4. 5x better than the SCAN implementation. The combined memory and registers resource consumption in our design is less than the compared two implementations while consuming a larger number of look-up tables (LUTs).

DOI
10.1109/jac-ecc56395.2022.10043968

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Polar codes are part of the 5G technology enablers as they nearly achieve memoryless channels capacity. Recently, many researchers explored Machine-learning (ML) techniques to increase the effectiveness of polar codes decoders. Recurrent Neural Network Belief Propagation decoders (RNN-BP) demonstrated superior efficiency in fewer cycles than standard Polar decoders, as traditional Belief propagation decoders performed poorly throughout a limited number of iterations. In this paper, we present the first implementation of the RNN-BP on Field Programmable Gate Arrays (FPGA). Two implementations are presented in this paper. The first one uses a single processing unit, and the second one is enhanced by multiple processing units with a pipeline register. The multiple processing units’ design of RNN-BP shows much higher throughput which is 17x of belief propagation decoder implementation and 3x of the Soft-output CANcellation (SCAN) decoder implementation. We also achieved better BER than the two mentioned implementations 7. 08x than the original BP and 4. 5x better than the SCAN implementation. The combined memory and registers resource consumption in our design is less than the compared two implementations while consuming a larger number of look-up tables (LUTs).
Several researchers are interested in polar codes for the sake of their capacity which nearly catches memoryless channels capacity. They have been used as part of the 5G technology. Polar decoders like belief propagation decoders showed unfavorable performance during limited iterations. Nowadays, Machine-learning (ML) techniques are used to enhance the efficiency of polar codes decoders. Recurrent neural network belief propagation (RNN-BP) decoders proved better efficiency in a lower number of cycles. In this paper, a performance scheduling learning technique is proposed. This technique achieves a coding gain of 0.2 dB for the RNN-BP decoder at BER of 2*10−4. A new approach is also introduced in the quantization step. In this approach, the quantization is done after the learning process is finished instead of after each iteration. This approach fixes the issue of model convergence. These combined approaches show up to 0.45 dB improvement at BER of 2*10−4.
Polar Codes can provably achieve the capacity of discrete memoryless channels. In order to make practical, it is necessary to propose efficient hardware decoder architectures. In this paper, the first hardware decoder architecture implementing the Soft-output CANcellation (SCAN) decoding algorithm, is presented. This decoder was implemented on Field Programmable Gate Array (FPGA) devices. The proposed architecture is parametrizable for any number of iterations without adding hardware complexity. The SCAN decoder architecture is compared to another soft-output decoder that implements a Belief Propagation (BP) algorithm. The SCAN decoder can reach a higher throughput than a BP decoder, with a lower memory footprint. Moreover, only one iteration with the SCAN algorithm leads to better decoding performance than 50 iterations of the BP algorithm.
In recent years, the emerging Deep Learning (DL) technology has made progress in the field of decoding. Current polar code neural network decoder has faster convergence speed and better Bit Error Rate (BER) performance than Belief Propagation (BP) decoding. However, it still has the problem of high computational complexity. Therefore, in order to improve this problem, this paper adopts the idea of improving information update in the iterative process, and proposes a Recurrent Neural Network (RNN) Offset Min-Sum (OMS) BP decoding algorithm that improves Left information update (RNN-OMSBP-L) . The simulation results show that, compared with the Deep Neural Network (DNN) BP(DNN-BP) decoding algorithm, this algorithm replaces all multiplications with a cost of 6.25% addition. Compared with the current optimized RNN OMS and approximate BP(RNN-OMS-BP) decoding algorithm, the decoding algorithm in this paper uses improved information to reduce 25% of the addition operations with almost no loss in BER performance, while saving part of the storage space overhead. Under the same BER performance, it reduces the number of iterations by 37.5%.
With the development of communication technology, it is urgent to design channel decoding algorithms to maximize the high throughput and minimize the latency. As the capacity achieving polar codes are adopted by 5-th generation wireless system (5G), it is required to design efficient the decoding algorithms for polar codes with high performance and low complexity. Deep neural network (DNN)-based algorithms which have shown superiority in other fields, can obtain better performance using multi-scale belief propagation (BP) algorithm, whereas the decoding complexity needs to be decreased. We propose a residual neural network based belief propagation (ResNet- BP) algorithm to solve the inherent drawbacks in the existing methods, by reducing the number of variables in the network and reducing the complexity in terms of multiplication. Simulation results demonstrate that the proposed method can achieve the approximating performance of recurrent neural network-based belief propagation (RNN-BP) with a lower number of iterations.
Abstract Compared with SC decoding, BP decoding with the parallel mechanism has higher throughput and lower latency, which is more suitable for the demand of 5G scene. To further improve its FER performance and reduce the memory overhead, a recurrent neural network-aided bit-flipping BP decoding of polar codes is proposed. Firstly, it uses bit flip to correct the wrong decoded bits during the decoding iteration. And then, the offset min-sum approximation is used to replace multiplication operation. Lastly the improved recurrent neural network architecture is adopted to realize parameter sharing. The simulation shows that the proposed scheme has a better error correction ability with fewer flipping times, and can effectively reduce the computational resource consumption and extra memory overhead of BP decoding.
Polar code decoding is an algorithmic challenge that is highly sensitive to the latency and throughput. It is used in 5G NR control channels and demands good noise decoding perfor- mance. Decoders such as successive cancellation (SC) and its list variant (SCL) achieve good bit error rates (BER) throughout the signal-to-noise ratio (SNR) regimes, but suffer from high latency and challenges in parallel implementation due to their sequential nature. The belief propagation (BP) decoder is an alternative representation of the polar graph, which allows parallel decoding over the whole codeword, but requires multiple iterations to reach acceptable BER. The hardware-friendly min-sum (MS) algorithmic simplification uses cheap instructions instead of expensive transcendental operations for higher throughput and lower latency, but further negatively impacts the noise decoding performance. This thesis considers the normalized variation of min-sum (NMS), which adds trainable scales per edge in the BP graph, applied to the 5G N=128 rate 1/2 polar code. The weights are trained by treating the unrolled 5 iteration BP graph as a neural network, which achieves a better-or- equal noise performance compared to the true BP decoder, a 0.5 dB average improvement over the untrained MS, and a 5x lower BER than true BP at 6 dB SNR, making the performance roughly comparable to SC in high SNR regions. These improvements are implemented as a single optimized GPU kernel with further optimiza- tions for better throughput, and run on an NVIDIA H100 GPU. The final achieved throughput peaks at 181 million codewords per second (11.6 information Gbit/s), which is around 25x the throughput of the XLA-compiled Sionna framework running the same decoder, and around 190x of a 192-thread CPU implementation.