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IEEE International Electrical and Energy Conference (CIEEC)

Quantum annealing computing for grid partition in large-scale power systems

Dawei Wang, Kedi Zheng, Qixin Chen, Zhu Li, Shuo Liu

Published May 27, 2022• 2 citations
Publisher

Abstract

As more and more controllable devices equiped in the smart grid, the inceasing scale of binary virables brings time-consuming dimension explosion problems to traditional optimizations problems. As a parallel computing method, quantum computing is valuable for exploration to accelerate the optimization computation. The classic quantum annealer (QA) only can be used for quadratic unconstraint binary optimization (QUBO) problems. This paper is to explore a novel algorithm based on the quantum annealer for grid partition problems. It is a typical large-scale Integer Quadratic Programming (IQP) problems. The proposed quantum algorithm attemped to apply Lagrangian relaxation (LR) and alternating direction method of multipliers (ADMM), to transform an IQP problem to general format of QUBO problems. Some numerical cases of the grid partition are discussed to compare the performance of the proposed algorithm with some typical methods, thus verifing the feasibility and performance of this ADMM-QA algorithm.

DOI
10.1109/cieec54735.2022.9846717

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As more and more controllable devices equiped in the smart grid, the inceasing scale of binary virables brings time-consuming dimension explosion problems to traditional optimizations problems. As a parallel computing method, quantum computing is valuable for exploration to accelerate the optimization computation. The classic quantum annealer (QA) only can be used for quadratic unconstraint binary optimization (QUBO) problems. This paper is to explore a novel algorithm based on the quantum annealer for grid partition problems. It is a typical large-scale Integer Quadratic Programming (IQP) problems. The proposed quantum algorithm attemped to apply Lagrangian relaxation (LR) and alternating direction method of multipliers (ADMM), to transform an IQP problem to general format of QUBO problems. Some numerical cases of the grid partition are discussed to compare the performance of the proposed algorithm with some typical methods, thus verifing the feasibility and performance of this ADMM-QA algorithm.
Quantum annealing (QA) can be used to efficiently solve quadratic unconstrained binary optimization (QUBO) problems. Grid partitioning (GP), which is a classic NP-hard integer programming problem, can potentially be solved much faster using QA. However, inequality constraints in the GP optimization model are difficult to handle. In this study, a novel solution framework based on QA is proposed for GP problems. The integer slack (IS) and binary expansion methods are applied to transform GP problems into QUBO problems. Instead of introducing continuous variables in traditional slack methods, the proposed IS method can avoid complex iteration processes when using QA. The case study demonstrates that the IS method obtains accurate feasible solutions with less calculation time.
Graph partitioning is a fundamental problem in various fields, including computer graphics, high-performance computing, and network design. Traditional graph partitioning algorithms often suffer from high computational complexity, particularly when dealing with large and complex graphs. This research investigates the potential of quantum-inspired optimization techniques, specifically leveraging concepts from quantum annealing, to accelerate the graph partitioning process. We formulate the graph partitioning problem as a Quadratic Unconstrained Binary Optimization (QUBO) problem, allowing us to simulate the behavior of a quantum annealer on classical hardware. The core of our approach involves mapping the graph's connectivity structure onto a QUBO, representing nodes as binary variables and edges as constraints. By exploiting the inherent parallelism of quantum annealing, we aim to find optimal or near-optimal partitions significantly faster than conventional methods. The results demonstrate the feasibility and potential advantages of this quantum-inspired strategy for graph partitioning, offering a promising direction for tackling computationally intensive graph problems.
Graph partitioning has many applications in powersystems from decentralized state estimation to parallel simulation. Focusing on parallel simulation, optimal grid partitioning minimizes the idle time caused by different simulation times for the sub-networks and their components and reduces the overhead required to simulate the cuts. Partitioning a graph into two parts such that, for example, the cut is minimal and the subgraphs have equal size is an NP-hard problem. In this paper we show how optimal partitioning of a graph can be obtained using quantum annealing (QA). We show how to map the requirements for optimal splitting to a quadratic unconstrained binary optimization (QUBO) formulation and test the proposed formulation using a current D-Wave QPU. We show that the necessity to find an embedding of the QUBO on current D-Wave QPUs limits the problem size to under 200 buses and notably affects the time-to-solution. We finally discuss the implications on near-term implementation of QA in combination to traditional CPU or GPU based simulation.
Graph partitioning has many applications in power systems, from decentralized state estimation to parallel simulation. Focusing on parallel simulation, optimal grid partitioning minimizes the idle time caused by different simulation times for the sub-networks and their components and reduces the overhead required to simulate the cuts. Partitioning a graph into two parts such that, for example, the cut is minimal and the sub-graphs have equal size is an NP-hard problem. In this paper, we show how optimal partitioning of a graph can be obtained using quantum annealing (QA). We show how to map the requirements for optimal splitting to a quadratic unconstrained binary optimization (QUBO) formulation and test the proposed formulation using a current D-Wave QPU. We show that the necessity to find an embedding of the QUBO on current D-Wave QPUs limits the problem size to under 200 buses and notably affects the time-to-solution. We finally discuss the implications of quantum hardware non-ideality on near term implementation in the simulation loop.
Graph partitioning has many applications in power systems, from decentralized state estimation to parallel simulation. Focusing on parallel simulation, optimal grid partitioning minimizes the idle time caused by different simulation times for the sub-networks and their components and reduces the overhead required to simulate the cuts. Partitioning a graph into two parts such that, for example, the cut is minimal and the sub-graphs have equal size is an NP-hard problem. In this paper, we show how optimal partitioning of a graph can be obtained using quantum annealing (QA). We show how to map the requirements for optimal splitting to a quadratic unconstrained binary optimization (QUBO) formulation and test the proposed formulation using a current D-Wave QPU. We show that the necessity to find an embedding of the QUBO on current D-Wave QPUs limits the problem size to under 200 buses and notably affects the time-to-solution. We finally discuss the implications of quantum hardware non-ideality on near term implementation in the simulation loop.
Graph partitioning has many applications in power systems, from decentralized state estimation to parallel simulation. Focusing on parallel simulation, optimal grid partitioning minimizes the idle time caused by different simulation times for the sub-networks and their components and reduces the overhead required to simulate the cuts. Partitioning a graph into two parts such that, for example, the cut is minimal and the sub-graphs have equal size is an NP-hard problem. In this paper, we show how optimal partitioning of a graph can be obtained using quantum annealing (QA). We show how to map the requirements for optimal splitting to a quadratic unconstrained binary optimization (QUBO) formulation and test the proposed formulation using a current D-Wave QPU. We show that the necessity to find an embedding of the QUBO on current D-Wave QPUs limits the problem size to under 200 buses and notably affects the time-to-solution. We finally discuss the implications of quantum hardware non-ideality on near term implementation in the simulation loop.