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Array Representation of Entanglement for Pseudo-Quantum Gate Computing on Conventional Digital Circuits

Takeshi Hirano

Published Jun 25, 2020• 0 citations
Publisher

Abstract

Entanglement is important on quantum gate based computer. Simple implementation of simulated entanglement on conventional digital circuits requires spatial complexity O(2^N) where N is number of qubits. In this article, array representation of entanglement which requires spatial complexity O(N^2) is proposed for simulated quantum gate on conventional digital circuits. Simulation shows proposed method can solve the problem which Deutsch-Jozsa algorithm solves.

DOI
10.36227/techrxiv.12554300.v1

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Entanglement is important on quantum gate based computer. Simple implementation of simulated entanglement on conventional digital circuits requires spatial complexity O(2^N) where N is number of qubits. In this article, array representation of entanglement which requires spatial complexity O(N^2) is proposed for simulated quantum gate on conventional digital circuits. Simulation shows proposed method can solve the problem which Deutsch-Jozsa algorithm solves.
[Note] Method in this article found as wrong and does not work. Entanglement is important on quantum gate based computer. Simple implementation of simulated entanglement on conventional digital circuits requires spatial complexity O(2^N) where N is number of qubits. In this article, array representation of entanglement which requires spatial complexity O(N^2) is proposed for simulated quantum gate on conventional digital circuits. Simulation shows proposed method can solve the problem which Deutsch-Jozsa algorithm solves.
[Note] Method in this article found as wrong and does not work. Entanglement is important on quantum gate based computer. Simple implementation of simulated entanglement on conventional digital circuits requires spatial complexity O(2^N) where N is number of qubits. In this article, array representation of entanglement which requires spatial complexity O(N^2) is proposed for simulated quantum gate on conventional digital circuits. Simulation shows proposed method can solve the problem which Deutsch-Jozsa algorithm solves.
In order to achieve speedup over conventional classical computing for finding solution of computationally hard problems, quantum computing was introduced. Quantum algorithms can be simulated in a pseudo quantum environment, but implementation involves realization of quantum circuits through physical synthesis of quantum gates. This requires decomposition of complex quantum gates into a cascade of simple one qubit and two qubit gates. The methodological framework for physical synthesis imposes a constraint regarding placement of operands (qubits) and operators. If physical qubits can be placed on a grid, where each node of the grid represents a qubit then quantum gates can only be operated on adjacent qubits, otherwise SWAP gates must be inserted to convert non-Linear Nearest Neighbor architecture to Linear Nearest Neighbor architecture. Insertion of SWAP gates should be made optimal to reduce cumulative cost of physical implementation. A schedule layout generation is required for placement and routing apriori to actual implementation. In this paper, two algorithms are proposed to optimize the number of SWAP gates in any arbitrary quantum circuit. The first algorithm is intended to start with generation of an interaction graph followed by finding the longest path starting from the node with maximum degree. The second algorithm optimizes the number of SWAP gates between any pair of non-neighbouring qubits. Our proposed approach has a significant reduction in number of SWAP gates in 1D and 2D NTC architecture.
The quantum algorithms could efficiently solve problems having exponential classical solutions [8]. The circuit model is considered as the most feasible implementation of the quantum algorithms [17]. This paper tries to find common ground between classical circuit design techniques and quantum computation, by identifying quantum circuit specification and simulation tools under the form of Hardware Description Languages (HDLs). The HDL-based simulation approach could reduce the complexity of quantum circuit simulation, by considering entanglement as the main source of gate-level simulation complexity, and isolating it in an automated manner. This is possible by taking advantage of the HDL feature of describing a circuit with both structural and functional architectures. We also performed an analysis of our methodology effectiveness, for the arithmetic circuits involved in Shor's algorithm and the circuits implementing Grover's algorithm. Our method is further improved by an entangled representation avoidance technique called 'bubble logic insertion'.
Abstract Quantum computation (QC) and digital quantum simulation (DQS) essentially require two- or multi-qubit controlled-NOT (CNOT) or -phase gates. We propose an alternative pathway for QC and DQS using a multi-qubit parity gate in a one- or two-dimensional Rydberg atom array. The basic principle of the Rydberg parity gate (RPG) is that the operation on the target qubit is controlled by the parity of the control qubits. First, we discuss how to construct a three-qubit RPG in a one-dimensional atom array, based on dark state resonances. We optimize the gate parameters by numerically analyzing the time evolution of the computational basis states to maximize the gate fidelity. We also show that our proposed RPG is extremely robust against the Rydberg blockade error. Then to scale up, we propose multi-control RPG in a two-dimensional array of atoms. We show how these multiqubit parity gates can replace a long sequence of two-qubit gates in a quantum circuit. To demonstrate the efficiency of our proposed parity gates over the conventional CNOT or CZ gate in QC and DQS, we implement the Deutsch–Jozsa algorithm and simulate the Ising Hamiltonian. The results show that RPG can be a better substitute of the CNOT gate to yield better results, as it decreases the circuit noise by reducing circuit depth.