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Journal of Signal Processing Systems

Hardware Implementation for Bipartite Belief Propagation Polar Decoding with Bit Flipping

Houren Ji, Zihao Gong, Yifei Shen, Yunhao Xu, Zaichen Zhang, Xiaohu You, Chuan Zhang

Published Jul 9, 2021• 0 citations
Publisher
DOI
10.1007/s11265-020-01625-z

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For the scenarios with high throughput requirements, the belief propagation (BP) decoding is one of the most promising decoding strategies for polar codes. By pruning the redundant variable nodes (VNs) and check nodes (CNs) in the original factor graph, the graph is condensed to a sparse bipartite graph which is similar to the graph for low-density parity-check (LDPC) codes. In this paper, we introduce the bit-flipping scheme into the LDPC-like BP (L-BP) decoding and propose two methods to identify the error-prone VNs. By additional decoding attempts, the L-BP flip (L-BPF) decoding improves the error-rate performance with a similar average complexity for high Eb=N0values. The simulation results show that the L-BPF decoding achieves 0:25 dB gain compared with the L-BP decoding.
Belief propagation list (BPL) decoding for polar codes has attracted more attention due to its inherent parallel nature. However, a large gap still exists with CRC-aided SCL (CA-SCL) decoding. In this work, an improved segmented belief propagation list decoding based on bit flipping (SBPL-BF) is proposed. On the one hand, the proposed algorithm makes use of the cooperative characteristic in BPL decoding such that the codeword is decoded in different BP decoders. Based on this characteristic, the unreliable bits for flipping could be split into multiple subblocks and could be flipped in different decoders simultaneously. On the other hand, a more flexible and effective processing strategy for the priori information of the unfrozen bits that do not need to be flipped is designed to improve the decoding convergence. In addition, this is the first proposal in BPL decoding which jointly optimizes the bit flipping of the information bits and the code bits. In particular, for bit flipping of the code bits, a H-matrix aided bit-flipping algorithm is designed to enhance the accuracy in identifying erroneous code bits. The simulation results show that the proposed algorithm significantly improves the error-correction performance of BPL decoding for medium and long codes. It is more than 0.25 dB better than the state-of-the-art BPL decoding at a block error rate (BLER) of 10−5, and outperforms CA-SCL decoding in the low signal-to-noise (SNR) region for (1024,0.5) polar codes.