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Synthesis of Topological Quantum Circuits

Alexandru Paler, Simon J. Devitt, Kae Nemoto, Ilia Polian

Published Aug 14, 2016• 10 citations
OpenAlex

Abstract

Abstract—Topological quantum computing has recently proven itself to be a very powerful model when considering large-scale, fully error corrected quantum architectures. In addition to its robust nature under hardware errors, it is a software driven method of error corrected computation, with the hardware responsible for only creating a generic quantum resource (the topological lattice). Computation in this scheme is achieved by the geometric manipulation of holes (defects) within the lattice. Interactions between logical qubits (quantum gate operations) are implemented by using particular arrangements of the defects, such as braids and junctions. We demonstrate that junction-based topological quantum gates allow highly regular and structured implementation of large CNOT (controlled-not) gate networks, which ultimately form the basis of the error corrected primitives that must be used for an error corrected algorithm. We present a number of heuristics to optimise the area of the resulting structures and therefore the number of the required hardware resources. I.

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Scientific Reports•Apr 11, 2014•31 citations
Abstract—Topological quantum computing has recently proven itself to be a very powerful model when considering large-scale, fully error corrected quantum architectures. In addition to its robust nature under hardware errors, it is a software driven method of error corrected computation, with the hardware responsible for only creating a generic quantum resource (the topological lattice). Computation in this scheme is achieved by the geometric manipulation of holes (defects) within the lattice. Interactions between logical qubits (quantum gate operations) are implemented by using particular arrangements of the defects, such as braids and junctions. We demonstrate that junction-based topological quantum gates allow highly regular and structured implementation of large CNOT (controlled-not) gate networks, which ultimately form the basis of the error corrected primitives that must be used for an error corrected algorithm. We present a number of heuristics to optimise the area of the resulting structures and therefore the number of the required hardware resources. I.
Topological quantum computing has recently proven itself to be a very powerful model when considering large-scale, fully error corrected quantum architectures. In addition to its robust nature under hardware errors, it is a software driven method of error corrected computation, with the hardware responsible for only creating a generic quantum resource (the topological lattice). Computation in this scheme is achieved by the geometric manipulation of holes (defects) within the lattice. Interactions between logical qubits (quantum gate operations) are implemented by using particular arrangements of the defects, such as braids and junctions. We demonstrate that junction-based topological quantum gates allow highly regular and structured implementation of large CNOT (controlled-not) gate networks, which ultimately form the basis of the error corrected primitives that must be used for an error corrected algorithm. We present a number of heuristics to optimise the area of the resulting structures and therefore the number of the required hardware resources.
Topological quantum computing has recently proven itself to be a powerful computational model when constructing viable architectures for large scale computation. The topological model is constructed from the foundation of a error correction code, required to correct for inevitable hardware faults that will exist for a large scale quantum device. It is also a measurement based model of quantum computation, meaning that the quantum hardware is responsible only for the construction of a large, computationally universal quantum state. This quantum state is then strategically consumed, allowing for the realisation of a fully error corrected quantum algorithm. The number of physical qubits needed by the quantum hardware and the amount of time required to implement an algorithm is dictated by the manner in which this universal quantum state is consumed. In this paper we examine the problem of algorithmic optimisation in the topological lattice and introduce the required elements that will be needed when designing a classical software package to compile and implement a large scale algorithm on a topological quantum computer.
Topological quantum computing has recently proven itself to be a powerful computational model when constructing viable architectures for large scale computation. The topological model is constructed from the foundation of a error correction code, required to correct for inevitable hardware faults that will exist for a large scale quantum device. It is also a measurement based model of quantum computation, meaning that the quantum hardware is responsible only for the construction of a large, computationally universal quantum state. This quantum state is then strategically consumed, allowing for the realisation of a fully error corrected quantum algorithm. The number of physical qubits needed by the quantum hardware and the amount of time required to implement an algorithm is dictated by the manner in which this universal quantum state is consumed. In this paper we examine the problem of algorithmic optimisation in the topological lattice and introduce the required elements that will be needed when designing a classical software package to compile and implement a large scale algorithm on a topological quantum computer.
Topological quantum computation is a promising technique to achieve large-scale, error-corrected computation. Quantum hardware is used to create a large, 3-dimensional lattice of entangled qubits while performing computation requires strategic measurement in accordance with a topological circuit specification. The specification is a geometric structure that defines encoded information and fault-tolerant operations. The compilation of a topological circuit is one important aspect of programming a quantum computer, another is the mapping of the topological circuit into the operations performed by the hardware. Each qubit has to be controlled, and measurement results are needed to propagate encoded quantum information from input to output. In this work, we introduce an algorithm for mapping an topological circuit to the operations needed by the physical hardware. We determine the control commands for each qubit in the computer and the relevant measurements that are needed to track information as it moves through the circuit.
Quantum error correction is a crucial technology for fault tolerant quantum computing. On superconducting platforms, hardware defects in large scale quantum processors can disrupt the regular lattice structure of topological codes and impair their error correction capabilities. Although defect adaptive methods for surface codes have been extensively studied, other topological codes such as color codes still lack a systematic framework for handling defects. To address this issue, we propose a universal superstabilizer scheme applicable to data qubit defects in arbitrary stabilizer codes. Based on this scheme, we develop concrete repair methods for isolated defects of both internal data qubits and ancilla qubits in color codes defined on square lattices. Furthermore, for ancilla qubit defects, we present two optimization schemes. One scheme reuses neighboring ancilla qubits, and the other employs iSWAP gates. Unlike conventional approaches that directly disable neighboring data qubits and thus cause resource waste, both of our schemes avoid such waste and consequently achieve a lower logical error rate.Integrating the above techniques, we construct a comprehensive defect adaptive architecture for color codes to handle various defect clusters. We also show that our scheme supports a full transversal Clifford gate set and lattice surgery operations. These results provide a systematic theoretical pathway for deploying robust and low overhead color codes on defective quantum hardware.
Topological quantum computation is a promising technique to achieve large-scale, error-corrected computation. Quantum hardware is used to create a large, 3-dimensional lattice of entangled qubits while performing computation requires strategic measurement in accordance with a topological circuit specification. The specification is a geometric structure that defines encoded information and fault-tolerant operations. The compilation of a topological circuit is one important aspect of programming a quantum computer, another is the mapping of the topological circuit into the operations performed by the hardware. Each qubit has to be controlled, and measurement results are needed to propagate encoded quantum information from input to output. In this work, we introduce an algorithm for mapping an topological circuit to the operations needed by the physical hardware. We determine the control commands for each qubit in the computer and the relevant measurements that are needed to track information as it moves through the circuit.