Future universal quantum computers solving problems of practical relevance are expected to require at least $10^6$ qubits, which is a massive scale-up from the present numbers of less than 50 qubits operated together. Out of the different types of qubits, solid state qubits are considered to be viable candidates for this scale-up, but interfacing to and controlling such a large number of qubits is a complex challenge that has not been solved yet. One possibility to address this challenge is to use qubit control circuits located close to the qubits at cryogenic temperatures. In this work we evaluate the feasibility of this idea, taking as a reference the physical requirements of a two-electron spin qubit and the specifications of a standard 65 nm complementary metal-oxide-semiconductor (CMOS) process. Using principles and flows from electrical systems engineering we provide realistic estimates of the footprint and of the power consumption of a complete control-circuit architecture. Our results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with our concept.
Future universal quantum computers solving problems of practical relevance are expected to require at least 106 qubits, which is a massive scale-up from the present numbers of less than 50 qubits operated together. Out of the different types of qubits, solid state qubits are considered to be viable candidates for this scale-up, but interfacing to and controlling such a large number of qubits is a complex challenge that has not been solved yet. One possibility to address this challenge is to use qubit control circuits located close to the qubits at cryogenic temperatures. In this work we evaluate the feasibility of this idea, taking as a reference the physical requirements of a two-electron spin qubit and the specifications of a standard 65 nm complementary metal-oxide-semiconductor (CMOS) process. Using principles and flows from electrical systems engineering we provide realistic estimates of the footprint and of the power consumption of a complete control-circuit architecture. Our results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with our concept.
Abstract Future universal quantum computers solving problems of practical relevance are expected to require at least 106 qubits, which is a massive scale-up from the present numbers of less than 50 qubits operated together. Out of the different types of qubits, solid state qubits are considered to be viable candidates for this scale-up, but interfacing to and controlling such a large number of qubits is a complex challenge that has not been solved yet. One possibility to address this challenge is to use qubit control circuits located close to the qubits at cryogenic temperatures. In this work we evaluate the feasibility of this idea, taking as a reference the physical requirements of a two-electron spin qubit and the specifications of a standard 65 nm complementary metal-oxide-semiconductor process. Using principles and flows from electrical systems engineering we provide realistic estimates of the footprint and of the power consumption of a complete control-circuit architecture. Our results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with our concept.
A systematic investigation of currently implemented cryogenic electronics for controlling and reading out spin qubits using complementary metal-oxide semiconductor (CMOS) technology is done. Scalability is the primary focus in developing these circuits, as enabling universal quantum computing requires increasing the number of qubits by several orders of magnitude. Low power dissipation is a main quality benchmark for cryogenic circuits that is being optimized. Next to that, the possibility of connecting multiple control signals to each qubit is a challenge for large qubit numbers. Depending on the placement of the electronics, different power budgets and connectivity options are available. These characteristics are used to discuss medium and long-term use-cases for existing designs and what future concepts and developments might be possible or necessary for full scalability on the example of spin qubit operation electronics.
Abstract A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction1–3. However, with each physical qubit needing multiple control lines, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware4–6. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired up by miniaturized interconnects7–10. Even so, heat and crosstalk from closely integrated control have the potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise11,12. Here we benchmark silicon metal-oxide-semiconductor (MOS)-style electron spin qubits controlled by heterogeneously integrated cryo-complementary metal-oxide-semiconductor (cryo-CMOS) circuits with a power density sufficiently low to enable scale-up. Demonstrating that cryo-CMOS can efficiently perform universal logic operations for spin qubits, we go on to show that milli-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our sub-kelvin CMOS platform, with about 100,000 transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a ‘chiplet-style’ control architecture.
Quantum computers have gained widespread interest as they can potentially solve problems that are intractable even for today’s supercomputers, such as the simulation of quantum systems as initially proposed by Feynman. To achieve such tremendous progress, a quantum computer relies on processing the information stored in quantum bits (qubits), the fundamental units of quantum computation, similar to the bits in a classical (i.e., non-quantum) processor. In general, a quantum processor comprising several qubits is connected through a quantum-to-classical interface consisting of classical electrical circuits for manipulating and reading out their quantum state. The accuracy of an operation on a qubit is characterized using the fidelity, which is 100 % in case of a perfect operation. In practice, a fidelity between 99 % and 99.9 % is typically achieved in today’s experiments with less than 100 qubits, limited by non-idealities in the control signals and by the implementation of the physical qubit itself. Since such qubit fidelities are too low to execute relevant quantum algorithms, quantum error correction schemes have been developed which rely on a much larger number of qubits to correct for possible errors, resulting in the need for quantum processors with thousands or millions of qubits. Solid-state qubits promise the largescale integration required to scale to millions of qubits, as they exploit the lithographic fabrication techniques borrowed from the semiconductor industry. However, state-of-theart solid-state qubits, such as transmons and single-electron spin qubits, must be typically cooled to cryogenic temperatures in a dilution refrigerator to exhibit quantum behavior. Because of the limited number of qubits (< 100) in state-of-theart solid-state quantum processors, the classical controller is currently implemented by general-purpose instruments or by tailor-made controllers operating at room temperature connected via several wires to the qubits in the cryogenic chamber. However, these systems must scale to support millions of qubits. While scaling up the underlying quantum processor is already exceptionally challenging, building the electronics required to interface such a large-scale processor is just as relevant and arduous.
Abstract The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications1. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)2. When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm10, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.
For the realization of a quantum computer, a good qubit design as the basic building block is a nontrivial starting point. To fully leverage the potential of quantum computing, quantum processors will likely have to incorporate billions of high-quality qubits. Several approaches are being pursued and exhibit different strength and weaknesses. The device concepts and fabrication procedures for semiconductor based qubits are very similar to those used in the semiconductor industry. Using the spin-degree of freedom, their coherence properties and the quality of single-qubit operations have now reached the required level and are on par with competing approaches. Two-qubit operations will likely follow suit in the near future. With these basic requirements being met, it is now time to think if and how increasingly large multi-qubit systems and eventually functional quantum processor can be realized. This quest raises many pertinent questions, some of which equally apply to other qubit platforms. How reproducibly can the different types of semiconductor qubits be produced? How can their operating point be adjusted efficiently and in an automated way? How can they be connected to form meaningful multi-qubit circuits? How severe are multi-qubit control issues such as crosstalk and frequency crowding, and how can they be avoided? What control system architectures are most suitable for operating large numbers of qubits? What is the limit of cryogenic electronics regarding power consumption and integration density? This paper gives a (partial) overview of the state of the art in the field and discusses future challenges associated with the realization of large-scale quantum processors, many of which will greatly benefit from input from engineering science. The guiding vision is that of a highly integrated quantum processor with an ultra-low power cryogenic control system.