With more and more powerful quantum computers becoming available, there is an increasing interest in the efficient mapping of a given quantum circuit to a particular quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits. In this paper, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. We show that choosing different quantum-level decompositions can indeed have a significant impact on the mapping overhead. Based on this observation, we present an approach to perform design space exploration to obtain quantum circuits with reduced overhead by exploiting information about the targeted quantum hardware as well as the reversible circuit. An experimental evaluation shows that this approach often leads to considerable reductions of the technology mapping overhead with negligible runtime.
With more and more powerful quantum computers becoming available, there is an increasing interest in the efficient mapping of a given quantum circuit to a particular quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits. In this paper, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. We show that choosing different quantum-level decompositions can indeed have a significant impact on the mapping overhead. Based on this observation, we present an approach to perform design space exploration to obtain quantum circuits with reduced overhead by exploiting information about the targeted quantum hardware as well as the reversible circuit. An experimental evaluation shows that this approach often leads to considerable reductions of the technology mapping overhead with negligible runtime.
Quantum computation received a steadily growing attention in recent years, especially supported by the emergence of publicly available quantum computers like the popular IBM QX series. In order to execute a reversible or quantum circuit on those devices, a mapping is required that replaces each reversible or quantum gate by an equivalent cascade of elementary, i.e. directly executable, gates-a task which tends to induce a significant mapping overhead. Several approaches have been proposed for this task which either rely on the swapping of physically adjacent qubits or the use of precomputed templates, so-called remote CNOT gates. In this paper, we show that combining both, swapping and remote gates, at the reversible circuit level has the prospect of significantly reducing the mapping overhead. We propose a methodology to compute the optimal combination of swaps and templates for Multiple-Controlled Toffoli gates. By using a formulation as a single-source shortest-path problem, a complete database of optimal combinations can be computed efficiently. Experimental results indicate that the mapping overhead can be significantly reduced.
Quantum information processing is of interest as it offers the potential for a new generation of very powerful computers supporting novel computational paradigms. Over the last couple of decades, different aspects of quantum computers ranging from quantum algorithms to quantum physical design have received growing attention. One of the most important research areas is the synthesis and post-synthesis optimization of reversible and quantum circuits. Many synthesis and optimization approaches can be found in the literature, yet, due to the complexity of the problem, finding approaches leading to optimal, or near optimal, results is still an open problem. The synthesized circuits are usually evaluated based on quantum cost models. Therefore, they are often technology mapped to circuits of more primitive gates. To this end, various technology mapping approaches have also been proposed in the past few years. Related work shows an existing gap in optimized technology mapping for reversible and quantum circuits. In this dissertation, an optimized technology mapping design flow is introduced for mapping reversible circuits to quantum circuits. The contributions of this dissertation are classified as follows: - New reversible circuit optimization methods. - Optimized reversible to quantum mapping approaches. - New quantum gate libraries and new cost models for reversible gates based on the new libraries. - Quantum circuit optimization approaches. The steps above, form an optimized flow for mapping reversible circuits to quantum circuits. At each step of the design flow optimized and consistent approaches are suggested with the goal of reducing the quantum cost of the synthesized reversible circuits. The evaluations show that the proposed mapping methodology leads to significant improvement in the quantum cost of the existing benchmark circuits.
Quantum cost is the most important criteria to evaluate reversible and quantum circuits. Also the fundamental building blocks of reversible and quantum circuits are Multiple-Control Toffoli (MCT) gates. The synthesis of MCT based reversible circuits are usually conducted into two steps. First, MCT circuits are decomposed into quantum circuits and then they are optimized using various techniques such as template matching, moving rules to reduce the quantum cost of reversible circuits. In this paper, we propose new techniques to decompose the Toffoli gates, in which MCT based circuits are mapped into a corresponding quantum realization. The main improvement is that the resulting quantum realization of MCT based circuits makes significantly better realization than those achieved in the earlier approaches and further reduction is possible using some other optimization techniques. Experimental results show that our new techniques enable to get sub-optimal realization of the MCT based reversible circuits in decomposition stage and quantum cost reduction of the reversible circuits is achieved by using that sub-optimal realization.
The Clifford+T quantum gate library has attracted much interest in the design of quantum circuits, particularly since the contained operations can be implemented in a fault-tolerant manner. Since fault tolerant implementations of the T gate have very high latency, synthesis and optimization are aiming at minimizing the number of T stages, referred to as the T-depth. In this paper, we present an approach to map mixed polarity multiple controlled Toffoli gates into Clifford+T quantum circuits. Our approach is based on the multiple control Toffoli mapping algorithms proposed by Barenco et al., which are given T-depth optimized Clifford+T translations. Experiments show that our approach leads to a significant T-depth reduction of 54% on average.
Quantum computers have emerged as an alternative computer paradigm that will allow to solve some complex problems of large numbers that are not tractable for classical computers, e.g. factorization. Quantum computers also have the ability to simulate quantum mechanics in a real and direct way. The development of quantum computers faces many unique obstacles. In recent years, various quantum computer prototypes have been created by com- panies such as Google and IBM, on which we can run some quantum algorithms. But these prototypes are far from the quantum computers we envision and can function like today?s classical computers. It is said that we are in the time of Noisy Intermediate-Scale Quantum (NISQ) computers. This means that current quantum computers are very noisy and their size is very small compared to classical comput- ers. The challenge with small, noisy quantum devices running quantum algorithms is that due to the hardware limitations they face which must be respected, quantum algorithm needs to be modified before their execution on quantum devices. To solve this problem in quantum computers, a mapping process is needed, which is part of the compilation step that modifies the quantum algorithms to take into account all the limitations of the targeted quantum device. After mapping process, the resulting quantum circuit usually has a higher number of gates and (execution time) latency, decreasing the algorithm?s reliability. Different mapping solutions have been already proposed. Most of them are meant for a specific quan- tum processor and different in methodology, approach and features. In addition, they are usually only compared in terms of added gates (gate overhead) or added circuit execution time (latency overhead). No thorough comparative analysis of the different mapping solutions performance and features has been performed so far. In this thesis, we apply structured Design Space Exploration to the mapping of quantum circuits. By doing so, we will be able to have a deeper understanding of this process, make a thorough comparison of the mapper approaches and even develop optimized solutions for given applications and quantum devices. Moreover, we apply Design Space Exploration to the generation of quantum algorithms used as benchmarks and start to explore profiling them in a structured approach.
Research in the field of quantum circuits has increased as technology advances in the development of quantum computers. IBM offers access to quantum computers via the cloud service called IBM Q. However, these architectures have some restrictions regarding the types of quantum gates that can be realized. This work proposes a methodology for the mapping of quantum and reversible circuits to the architectures made available by the IBM Q project. The methodology consists in finding CNOT mappings using a set of defined qubits movements to satisfy the architectures constraints by adding as few gates as possible. In order to reduce the number of CNOT gates needing mapping, the permutation of the circuit can be changed. One alternative to find this permutation is trough exhaustive search. However, is not feasible as the number of qubit increases. To solve this problem, the permutation problem was formulated as an Integer Linear Programming problem. The mapping of quantum circuits realized with non-implementable gates and reversible Toffoli circuits to the IBM quantum architectures were proposed in this work as well. This was done by adapting the developed CNOT mappings along with the Integer Linear Programming formulation. The proposed methodology was evaluated by mapping quantum and reversible circuits to an IBM quantum architectures with 5 and 16 qubits. The results were compared with two algorithms that map quantum circuits to IBM architectures. The cost metric used in the evaluation were the number of quantum gates and the number of levels (depth) of the circuits. Experimental results have shown that the proposed methodology outperforms the other approaches regarding the circuits' size. The results of the methodology used to implement quantum (with non-implementable gates) and Toffoli circuits to IBM architectures have shown that the mapping targeting a specific architecture constraints results in a smaller mapped circuit. The methodology developed can be easily adapted to any quantum architecture. Also, the proposed Integer Linear Programming formulation can be used in any reversible circuit and can be applied in other research areas.