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Scientific Reports

Quantum circuit optimization using quantum Karnaugh map

J.-H. Bae, Paul M. Alsing, Doyeol Ahn, Warner A. Miller

Published Sep 24, 2020• 36 citations
Publisher

Abstract

Every quantum algorithm is represented by set of quantum circuits. Any optimization scheme for a quantum algorithm and quantum computation is very important especially in the arena of quantum computation with limited number of qubit resources. Major obstacle to this goal is the large number of elemental quantum gates to build even small quantum circuits. Here, we propose and demonstrate a general technique that significantly reduces the number of elemental gates to build quantum circuits. This is impactful for the design of quantum circuits, and we show below this could reduce the number of gates by 60% and 46% for the four- and five-qubit Toffoli gates, two key quantum circuits, respectively, as compared with simplest known decomposition. Reduced circuit complexity often goes hand-in-hand with higher efficiency and bandwidth. The quantum circuit optimization technique proposed in this work would provide a significant step forward in the optimization of quantum circuits and quantum algorithms, and has the potential for wider application in quantum computation.

DOI
10.1038/s41598-020-72469-7

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Every quantum algorithm is represented by set of quantum circuits. Any optimization scheme for a quantum algorithm and quantum computation is very important especially in the arena of quantum computation with limited number of qubit resources. Major obstacle to this goal is the large number of elemental quantum gates to build even small quantum circuits. Here, we propose and demonstrate a general technique that significantly reduces the number of elemental gates to build quantum circuits. This is impactful for the design of quantum circuits, and we show below this could reduce the number of gates by 60% and 46% for the four- and five-qubit Toffoli gates, two key quantum circuits, respectively, as compared with simplest known decomposition. Reduced circuit complexity often goes hand-in-hand with higher efficiency and bandwidth. The quantum circuit optimization technique proposed in this work would provide a significant step forward in the optimization of quantum circuits and quantum algorithms, and has the potential for wider application in quantum computation.
Today, quantum computers are still in development and are an area actively studied by researchers.Although quantum computers have high potential, there are significant technical difficulties and obstacles to achieving practical applications.Many research labs and companies are working on increasing the number of qubits, solving stability problems, and improving error correction techniques, and scalability.These efforts aim at advances such as the development of more stable and reliable qubits, the discovery of more precise control and reading techniques, and the design of more advanced algorithms.This study aims to establish a connection between quantum computers and classical computers.To achieve this, research and work have employed a Karnaugh-based approach.Karnaugh maps serve as highly useful tools in the analysis of complex logic circuits.Depending on one's needs and design requirements, different logic functions can be analyzed and simplified using Karnaugh maps.In this study, the Karnaugh map-based method is utilized to obtain the Boolean function from the state table of the Quantum circuit generated from the RCViewer+ synthesis tool.Subsequently, the obtained function is transformed into a combinational logic circuit.As a result, an optimal combinational circuit corresponding to the quantum circuit can be obtained.
Quantum computations are typically performed as a sequence of basic operations, called quantum gates. Different gate sequences, called quantum circuits, can implement the same overall quantum computation. Since every additional quantum gate takes time and introduces noise into the system, it is important to find the smallest possible quantum circuit that implements a given computation, especially for near-term quantum devices that can execute only a limited number of quantum gates before noise renders the computation useless. An important building block for many quantum circuit optimization techniques is pattern matching: given a large and small quantum circuit, we would like to find all maximal matches of the small circuit, called a pattern , in the large circuit, considering pairwise commutation of quantum gates. In this work, we present the first classical algorithm for pattern matching that provably finds all maximal matches and is efficient enough to be practical for circuit sizes typical for near-term devices. We demonstrate numerically 1 that combining our algorithm with known pattern-matching-based circuit optimization techniques reduces the gate count of a random quantum circuit by ∼ 30% and can further improve practically relevant quantum circuits that were already optimized with state-of-the-art techniques.
There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of quantum devices produced over a next decade. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and effcient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms.
This paper presents a novel methodology for optimizing quantum circuit design utilizing topological optimization techniques. The core idea revolves around representing quantum circuits as topological networks and employing topological optimization algorithms to refine their structure. This approach aims to minimize the number of quantum gates required, thereby enhancing the efficiency and scalability of quantum computation. The research explores the potential of this method to significantly reduce circuit complexity and improve overall performance. The primary contribution lies in the application of topological optimization to the inherently complex domain of quantum circuit design, offering a potentially transformative approach to quantum computing. Mathematical formulations and key concepts are presented to illustrate the method's principles and demonstrate its feasibility.
Quantum computing is an emerging technology in which quantum mechanical properties are suitably utilized to perform certain compute-intensive operations faster than classical computers. Quantum algorithms are designed as a combination of quantum circuits that each require a large number of quantum gates, which is a challenge considering the limited number of qubit resources available in quantum computing systems. Our work proposes a technique to optimize quantum arithmetic algorithms by reducing the hardware resources and the number of qubits based on ZX calculus. We have utilized ZX calculus rewrite rules for the optimization of fault-tolerant quantum multiplier circuits where we are able to achieve a significant reduction in the number of ancilla bits and T-gates as compared to the originally required numbers to achieve fault-tolerance. Our work is the first step in the series of arithmetic circuit optimization using graphicalrewrite tools and it pavesthe way for advancing the optimization of various complex quantum circuits and establishing the potential for new applications of the same.
The design and optimization of quantum circuits is central to quantum computation. This paper presents new algorithms for compiling arbitrary 2n×2n unitary matrices into efficient circuits of (n−1)-controlled single-qubit and (n−1)-controlled-NOT gates. We first present a general algebraic optimization technique, which we call the Palindrome Transform, that can be used to minimize the number of selfinverting gates in quantum circuits consisting of concatenations of palindromic subcircuits. For a fixed column ordering of two-level decomposition, we then give an enumerative algorithm for minimal (n−1)-controlled-NOT circuit construction, which we call the Palindromic Optimization Algorithm. Our work dramatically reduces the number of gates generated by the conventional two-level decomposition method for constructing quantum circuits of (n − 1)-controlled single-qubit and (n − 1)-controlled-NOT gates.