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IEEE International Conference on Cloud Computing and Intelligence Systems (CCIS)

A Fast Optimization Algorithm for Nearest Neighbor Architecture Based on Quantum Weight

Fei Ding, Zhijing Guau, Fuji Ren

Published Dec 1, 2019• 2 citations
Publisher

Abstract

Optimization based on QC (quantum cost) for quantum circuits and the LNN (Linear Nearest Neighbor) Architecture are the bases for mapping quantum logic circuits into physical systems. The correlation between the underlying optimization and the upper layer of quantum logic design is an important issue that needs to be emphasized during the mapping process. In order to improve the efficiency and robustness for the above problems, a fast optimization algorithm for LNN architecture based on quantum weight is proposed. Based on quantum priority, a wire sequence initialization method is designed. Then the neighboring arrangement rule of the NCV gate library circuit and the optimization algorithm are given. The experimental results show that the proposed strategies can effectively reduce the QC and the number of inserted SWAP gates. The average optimization rate reaches 12.3% compared to the corresponding results.

DOI
10.1109/ccis48116.2019.9073740

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Optimization based on QC (quantum cost) for quantum circuits and the LNN (Linear Nearest Neighbor) Architecture are the bases for mapping quantum logic circuits into physical systems. The correlation between the underlying optimization and the upper layer of quantum logic design is an important issue that needs to be emphasized during the mapping process. In order to improve the efficiency and robustness for the above problems, a fast optimization algorithm for LNN architecture based on quantum weight is proposed. Based on quantum priority, a wire sequence initialization method is designed. Then the neighboring arrangement rule of the NCV gate library circuit and the optimization algorithm are given. The experimental results show that the proposed strategies can effectively reduce the QC and the number of inserted SWAP gates. The average optimization rate reaches 12.3% compared to the corresponding results.
In order to realize the linear nearest neighbor(LNN) of quantum circuits and reduce the quantum cost of the linear reversible quantum circuits, a method of synthesizing and optimizing linear reversible quantum circuits based on matrix multiplication is proposed. This method shows the matrix representation of linear quantum circuits by proposing the matrix representation of the CNOT gate and the SWAP gate. The rule of judging whether a two-qubit quantum circuit is in LNN state is proposed. The LNN realization by adding SWAP gates is proposed and the equivalence of two ways of adding SWAP gates is proved. The elimination rules of SWAP gates between two overlapped adjacent quantum gates in different cases are proposed, which reduce the quantum cost of quantum circuits after realizing the LNN architecture. We propose a particular algorithm to realize the LNN, which can effectively reduce the quantum cost and improve calculation efficiency by inserting the SWAP gates on parallel computing devices. Experiments show that the quantum cost can be improved by 34.31% on average and the speed-up ratio of the GPU-based algorithm can reach 4 times compared with the CPU-based algorithm.
In order to solve the fault tolerance and reliability problems of quantum circuit, a series of structural equivalence rules and optimization operation strategies of quantum circuit are proposed to minimize the number of T gates, increase T gate depth, minimize circuit level, reduce fault tolerance implementation costs and increase circuit reliability. In order to satisfy the nearest neighbor constraints of some quantum systems, a LNN (linear nearest neighbor) arrangement algorithm based on Clifford + T gate quantum circuit is presented. Experiments are done on some benchmarks of RevLib, the results show that the optimization rate of most functions and the running time of the algorithm are better than those of the existing literature.
In the last few years, tremendous improvement in the field of quantum computing has been witnessed. Although quantum technologies such as ion-trap, NMR, quantum dots have emerged as the promising platforms for implementing quantum circuits but these technologies have faced several design issues. One such important design problem is the nearest neighbor condition, which requires the qubits to interact with adjacent neighbors. This problem can be addressed by adding SWAP gates in the circuit. By doing so, the overhead in the circuit increases thus NN designs with minimum number of SWAP gates need to be developed. Focusing on this, here, in this work, we introduce a heuristic design method for efficient NN realization of quantum circuits in 2D architecture. Our NN transformation process is carried out in two phases, where initially in the first phase, the input circuit is mapped to 2D configuration using a qubit placement strategy and then in the second phase NN designs are obtained through SWAP gate insertion. At the end, the design algorithm has been evaluated over a large set of benchmark functions and the results are compared with some of the existing works. From this comparison, it is seen that our proposed method performs better than the reported works.
This paper presents models for transforming standard reversible circuits into Linear Nearest Neighbor (LNN) architecture without inserting SWAP gates. Templates to optimize the transformed LNN circuits are proposed. All minimal LNN circuits for all 3-qubit functions have been generated to serve as benchmarks to evaluate heuristic optimization algorithms. The minimal results generated are compared with optimized LNN circuits obtained from the post synthesis algorithm --- template matching with LNN templates. Experiments show that the suggested synthesis flow significantly improves the quantum cost of circuits.
In order to realize the linear nearest neighbor{(LNN)} of the quantum circuits and reduce the quantum cost of linear reversible quantum circuits, a method for synthesizing and optimizing linear reversible quantum circuits based on matrix multiplication of the structure of the quantum circuit is proposed. This method shows the matrix representation of linear quantum circuits by multiplying matrices of different parts of the whole circuit. The LNN realization by adding the SWAP gates is proposed and the equivalence of two ways of adding the SWAP gates is proved. The elimination rules of the SWAP gates between two overlapped adjacent quantum gates in different cases are proposed, which reduce the quantum cost of quantum circuits after realizing the LNN architecture. We propose an algorithm based on parallel processing in order to effectively reduce the time consumption for large-scale quantum circuits. Experiments show that the quantum cost can be improved by 34.31\% on average and the speed-up ratio of the GPU-based algorithm can reach 4 times compared with the CPU-based algorithm. The average time optimization ratio of the benchmark large-scale circuits in RevLib processed by the parallel algorithm is {95.57\%} comparing with the serial algorithm.
Real quantum computing technologies have different restrictions and constraints which need to be considered during circuit synthesis. In certain technologies, only physically adjacent qubits can interact. It is common to use a pair of SWAP gates to bring the control and target qubits of any quantum gate to adjacent lines and maintain correct circuit functionality. This paper introduces a new method to synthesize linear nearest neighbor quantum circuit on the base of the analysis of quantum state in circuit. For all 3-qubit quantum circuit, experimental results shows that our algorithm can reduce the quantum cost by approximately 30% on average compared with one recent proposed method.