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Advances in Cyber-Physical Systems

Implementing Quantum Fourier Transform in a Digital Quantum Coprocessor

Valerii Hlukhov

Published Mar 23, 2019• 5 citations
Publisher

Abstract

In this paper, the digital quantum coprocessor has been checked for the possibility of quantum Fourier transform, which is the main quantum operation of the Shor's algorithm. To do this, the model of the 4-qubit coprocessor has been created, its work has been simulated and it has been implemented in FPGA.
DOI
10.23939/acps2019.01.006

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In this paper a project for further research in digital quantum computing is presented. The experimental basis of the project is a previously developed digital quantum processor, which has been implemented in FPGA and checked for execution of a quantum Fourier transform, that is the main quantum operation of the Shor's algorithm. The project is directed to development of the design technologies, implementation, and research of the properties of a digital multi-qubit coprocessor. The novelty of this project and the methodology of its implementation are investigated. The necessary hardware and tools for designing a digital multi-qubit coprocessor are described and the effects of using the coprocessor in various research fields are discussed.
Quantum computers consist of two parts - a classical computer and its quantum coprocessor or accelerator. The functioning of the main elements of a quantum coprocessor is described by a wave function. You can create digital elements in FPGAs, the operation of which will be described by the wave function, so called digital qubits. Due to the high computational complexity of quantum computing such as Shor’s algorithm of factorization VHDL-descriptions of digital quantum units must be created for their implementation in FPGA. The article estimates the computational complexity of operations that must be performed according to the Shor’s algorithm. Also the article describes a multilevel generator of VHDL-descriptions for quantum Fourier transform implementation. The generator creates descriptions of both homogeneous and heterogeneous coprocessors. In addition, the generator creates test circuits to check the generated coprocessors. This makes it possible to study the created coprocessors, compare results of their functioning with ones of real quantum coprocessors and analyze them.
It is shown that true quantum computers are analog and probabilistic computers and, in fact,they play the role of coprocessors in relation to classical computers. A digital quantum coprocessor consists of digital qubits. Each digital qubit is a finite state machine, the state changes of which is described in the same way as the state changes of an analog qubit. A digital qubit is a chain of digital quantum gates. Each digital quantum gate is digital unit, the state changes of which is described in the same way as the state changes of an analog quantum gate. The main difference between digital qubit and digital quantum gate from analog ones is the presence of memory (more precisely, the possibility of its introduction into their circuit) and its use for organizing calculations. A digital qubit without feedbacks - a digital quantum gate that can be controlled using a classic computer, is a single step of a pipeline with a measurement unit (comparator), a pipeline register and a pipeline trigger at the output. The quantum Fourier transform (QFT) is part of many quantum algorithms, in particular the Shor'sfactorization algorithm. The structures of digital quantum gates, digital qubits, and a digital quantumcoprocessor capable of performing the QFT are presented. The results of the QFT of a multi-qubit digital quantum coprocessor implemented on one FPGA are presented. For this, a IP core generator of multi-qubit quantum coprocessors was created, cores work was simulated. Models were implemented in FPGAs and their time and hardware characteristics were determined. The execution time of one quantum Fourier transform does not depend on the number of qubits in the digital quantum coprocessor and is commensurate with the time of change of the electron spin. The hardware complexity linearly depends on the number of qubits. With an increase in the number of qubits, the rate of true results of QFT decreases, at 64 qubits it is 1.5%, the decrease is nonlinear
Quantum computers are analog and probabilistic computers and, in fact, they play the role of coprocessors in relation to classical computers. The components of quantum coprocessors are called qubits. Their behavior should be described by a wave function. In particular, qubits can be discrete objects - finite states machines. Such qubits will be called digital. Quantum coprocessors and quantum computers built on their basis will also be called digital. External influences on digital qubits are fed through digital quantum gates. So a digital qubit is a unique chain of digital quantum gates. Digital quantum coprocessor can be implemented in FPGA as several chains of digital quantum.The article explores FPGA-based digital quantum coprocessor. It consists of 32 qubits. The structures of digital quantum gates, digital qubits, and a digital quantum coprocessor capable of performing the quantum Fourier transform are presented. Digital qubits were implemented for the case of real amplitudes of the wave functions.The results of the quantum Fourier transform of a 32-qubit digital quantum coprocessor implemented on one FPGA are presented.The execution time of one quantum Fourier transform does not depend on the number of qubits in the digital quantum coprocessor and is commensurate with the time of electron spin change (near 10 ns). But the time complexity of the quantum Fourier transform is probabilistic polynomial in time. The measured ratio of correct results for a 32-qubit coprocessor is approximately 1700 ppm.
Real quantum computers are analog and probabilistic devices by their nature. But their FPGA-based digital versions also exist. A digital quantum coprocessor has already been created, which has 1024 digital qubits. It can already be used to work out various quantum algorithms, algorithms for the interaction of a classic computer and its quantum coprocessor, as well as for research various options for building digital qubits. The effect of digital qubit state code length on the probability of obtaining correct results is studied in the work. For the study, a homogeneous digital quantum coprocessor with 32 digital qubits which can perform quantum Fourier transformation is selected. It was shown that probability is improved with increase of the qubit state code length, that is, with increase of coprocessor hardware cost.
Classical quantum computer is analog probabilistic computer. The digital quantum computer that can be implemented in FPGA is described in the article. Digital quantum coprocessor is designed to implement algorithms for execution on analog quantum computers. A digital quantum coprocessor operates under the control of a classical computer and together they are digital quantum computer. The digital quantum coprocessor is a set of digital units called digital qubits that have multibit data input and one bit data output each. The digital qubit is a wave function calculator. There is pseudo random number generator (PRNG) in described digital qubit to generate the probabilistic output bit. One bit qubit output qb is formed by the probable reduction of its multibit result x to one bit (0 or 1) according to result value x and pseudo random code k (x is an angle which determines the position of normalized vector with length 1 in polar grid, it is a result of multibit input data calculation). The decision about output state is made after the functional conversion of the qubit multibit result x to result probability p - sin.x and subsequent comparison p with the pseudo random code k. Qb -1 when kp is described. This variant allows use one PRNG for all digital qubits. Qubit presentation as vector in Bloch's sphere and vector in polar grid is discussed in the work. Also two types of coprocessor data formats (Cartesian and polar) are described. Instruction set of digital quantum coprocessor based in vector presentation in polar coordinates are discussed.