Quantum computation relies on exploiting quantum mechanical phenomena, and has received significant attention in recent years. Higher-dimensional quantum systems increase the density of encoded information per computing element (e.g., qutrit for three-level system), resulting in less resource overhead. For instance, 63% reduction in the number of qutrits is possible for ternary quantum systems as compared to the corresponding binary systems. The proposed work exploits this fact to synthesize ternary reversible circuits employing a cycle-based technique. The method starts from the ternary reversible specification of a given function in the form of a permutation. The permutation cycles are factored into simpler three-cycles and two-cycles, which are then mapped to ternary reversible gates. Different gate libraries are used to synthesize three-cycles and two-cycles, respectively. A gate decomposition approach is also proposed to synthesize a quantum gate netlist in terms of elementary ternary quantum gates, viz. Muthukrishnan–Stroud gate and shift gate. Synthesis results on benchmark functions indicate that the proposed method results in 27% and 6% improvements in quantum cost and gate count, respectively, over existing works in the literature.
Quantum computation relies on exploiting quantum mechanical phenomena, and has received significant attention in recent years. Higher-dimensional quantum systems increase the density of encoded information per computing element (e.g., qutrit for three-level system), resulting in less resource overhead. For instance, 63% reduction in the number of qutrits is possible for ternary quantum systems as compared to the corresponding binary systems. The proposed work exploits this fact to synthesize ternary reversible circuits employing a cycle-based technique. The method starts from the ternary reversible specification of a given function in the form of a permutation. The permutation cycles are factored into simpler three-cycles and two-cycles, which are then mapped to ternary reversible gates. Different gate libraries are used to synthesize three-cycles and two-cycles, respectively. A gate decomposition approach is also proposed to synthesize a quantum gate netlist in terms of elementary ternary quantum gates, viz. Muthukrishnan–Stroud gate and shift gate. Synthesis results on benchmark functions indicate that the proposed method results in 27% and 6% improvements in quantum cost and gate count, respectively, over existing works in the literature.
Abstract Quantum computation which relies on exploiting quantum mechanical phenomena, has received significant attention in recent years. Higher dimensional quantum systems increase the density of encoded information per computing element (e.g. qutrit for the 3-level system), resulting in less resource overhead. Recently, there have been several works in the synthesis of ternary reversible functions, most of which are not scalable. Therefore, this study proposes a scalable approach for the synthesis of ternary logic functions using Max-Min algebra. In this approach, from a ternary truth table, Max-Min expressions are first generated with the help of ternary Max-Min algebra. Then, the expressions are minimized using Boolean simplification rules. After that, the minimized expressions are mapped to ternary reversible gates. We have also proposed a decomposition structure to map the ternary reversible gates into ternary elementary gates. Experimental evaluation shows that the proposed synthesis approach is more scalable as compared to existing synthesis approaches. Keywords: Ternary reversible circuit, quantum computing, qutrit, reversible literals, non-reversible literals Cite this Article P. Mercy Nesa Rani, Leniency Marbaniang, Majid Haghparast, Kamalika Datta. An Improved Ternary Logic Synthesis Approach Using Ternary Max-Min Algebra. Journal of Advanced Database Management & Systems. 2019; 6(2): 40–47p.
The problem of synthesis and optimization of reversible and quantum circuits have drawn the attention of researchers for the last two decades due to increasing interest in quantum computing. Although lot of works have been done on the synthesis of binary reversible circuits, very less works have been reported on the synthesis of ternary reversible circuits. Ternary circuits have lower cost of implementation as compared to their binary counterparts. However, the synthesis approaches that exist for ternary reversible circuits either use too many circuit lines (qutrits) or too many gates. Only one prior work has discussed the problem of generating cost-optimal ternary reversible circuits, but for a very restrictive gate library, which limits the approach to a specific subset of ternary reversible functions and often the solution becomes sub-optimal due to the imposed restrictions. The present paper overcomes that restriction, and uses multiple control ternary Toffoli gates with all possible ternary target operations as the gate library. This gate library is functionally complete and can be used to synthesize any arbitrary function. The proposed SAT-based synthesis approach provides low cost solutions in terms of the number of gates for any arbitrary ternary reversible function. Experimental results on various randomly generated permutations as well as standard ternary benchmarks establish this claim. The results can be used as template for other synthesis approaches by observing how far they deviate from the optimal solutions.
One of the main motivations for using ternary logic systems is the amount of information per circuit line is higher as compared to the corresponding binary logic representation, thereby leading to more compact circuit realizations. This is particularly attractive for quantum computing as qutrits are expensive resources and minimizing their number is one of the main objectives during synthesis. Therefore, ternary reversible logic synthesis has drawn significant attention among researchers. It deals with fundamental unit of information called qutrits that can exist in one of the three states |0>, |1> and |2>. Hence, the aim of this paper is to bridge the knowledge gap for the beginners in this domain than searching the entire space. Therefore, the present work discusses the basic concepts of ternary reversible logic and ternary reversible gates. The detailed discussion of the various ternary reversible logic synthesis will enable the beginners in this domain to understand the ternary reversible logic in a better way.
Reversible ternary circuit design is now being taken into consideration for its application within the quantum computer and other technologies associated with the nanotechnology domain, in addition to the advantages of the ternary logic application as opposed to binary logic. Multiplier circuit is one of the most important computing circuit in the ALU. Therefore, the circuit optimization for the multiplication will lead to efficient processor. In this paper, the reversible circuit for multiplication of two unsigned two-digit ternary numbers has been proposed. To construct reversible ternary multiplier, a new component termed TPPG with the quantum cost of 13 for partial product generation was proposed. In addition, we have introduced four new blocks of reversible ternary adder with the quantum cost of 11, 10, 7, 5 and one constant input, which can be used in the proposed multiplier circuit. We attempted to optimize the design of the circuits in terms of quantum cost, a number of primitive gates, constant inputs, and garbage outputs as far as possible. To realize all proposed circuits, one-qutrit shift gates and two-qutrit Muthukrishnan-Stroud gates were used.
Abstract In recent years, quantum computing has emerged as a leading approach for accelerating complex computations, leveraging quantum parallelism and entanglement to surpass classical limits. Although numerous quantum circuits based on reversible gates have been proposed, optimizing circuit efficiency remains a critical challenge, particularly in the noisy intermediate-scale quantum era, where error rates and coherence times constrain performance. Ternary quantum computing, which operates on three-level quantum systems (qutrits), offers a promising alternative by reducing circuit complexity and resource overhead. In particular, balanced ternary logic presents advantages over conventional ternary logic by enhancing resource efficiency and potentially mitigating quantum gate error rates. This paper focuses on two key objectives: first, the synthesis of a reversible 1-qutrit comparator circuit using balanced ternary logic, and second, the extension to a generalized n-qutrit comparator. The proposed 1-qutrit comparator achieves notable improvements over existing unbalanced designs, demonstrating a 65% reduction in quantum cost, 50% fewer constant inputs, and a 33% decrease in garbage outputs. These results highlight the potential of balanced ternary logic to enhance the efficiency of quantum circuits, making it a valuable contribution to the development of scalable and error-resilient quantum hardware.
Abstract Quantum computation is growing in significance and proving to be a powerful tool in meeting the high real-time computational demands of classical digital image processing. However, extensive research has been done on quantum image processing, mainly rooted in binary quantum systems. In this paper, we propose a new quantum ternary image circuit based on the analysis of the existing qutrit representation of quantum images. The proposed design utilizes ternary shift gates and ternary Muthukrishnan–Stroud gates, with the belief that this circuit can be used for ternary quantum image processing. This study makes a significant improvement compared to the existing counterpart in terms of quantum cost, the number of constant inputs, and garbage outputs, which are all essential parameters in quantum circuit design.