A novel approach for emulating quantum computers on classical platforms

Kingsuk Bag, Manish Goswami, Kavindra Kandpal

The introduction of quantum computing has led to an immense increase in performance of various search and encryption algorithms. However the practical realization of quantum computers is1a challenging task. Hence quantum algorithms are being modeled on classical platforms. Hardware emulation of quantum computers has been found to be more effective than software simulations. In this paper, Grover's search algorithm has been modeled in the classical platform using both hardware emulation and software simulation approaches. The modified architecture of the field programmable gate arrays (FPGAs) and the unique data path implemented in this paper results in considerable speed-up and lesser utilization of resources as compared to other existing works. This work includes both simulation and emulation of Grover’s search for 2,3 and 5 qubit systems. The novel emulation approach has led to a 104times reduction in time of search than the corresponding simulation.

Yongshan Ding, Frederic T. Chong

Scott Pakin

Y. H. Lee, Mohamed Khalil-Hani, Muhammad Nadzir Marsono

While physical realization of practical large-scale quantum computers is still ongoing, theoretical research of quantum computing applications is facilitated on classical computing platforms through simulation and emulation methods. Nevertheless, the exponential increase in resource requirement with the increase in the number of qubits is an inherent issue in classical modeling of quantum systems. In the effort to alleviate the critical scalability issue in existing FPGA emulation works, a novel FPGA-based quantum circuit emulation framework based on Heisenberg representation is proposed in this paper. Unlike previous works that are restricted to the emulations of quantum circuits of small qubit sizes, the proposed FPGA emulation framework can scale-up to 120-qubit on Altera Stratix IV FPGA for the stabilizer circuit case study while providing notable speed-up over the equivalent simulation model.

Naveed Mahmud, Esam El‐Araby

With rapid advancement in quantum computing technology, continuous efforts are being directed to simulation and emulation of quantum algorithms on classical platforms. A well-known limitation to classical emulation of quantum circuits is scalability. Existing hardware emulators implement gate-based circuit models of quantum circuits that result in heavy resource utilization and degrade the scalability of the system. Also, current quantum emulation hardware use fixedpoint arithmetic, which has an adverse effect on accuracy when the system is scaled up. In this work, we employ a complexmultiply-and-accumulate (CMAC) and lookup-based emulation approach that greatly reduces resource utilization and improves system scalability in terms of number of emulated qubits. We demonstrate emulation of up to 16 fully-entangled qubits which is highest among existing work. We design fully-pipelined, highthroughput hardware architectures that use floating-point precision for higher accuracy. Experimental evaluation and analysis of the architectures in terms of speed and area is also provided. The emulator is prototyped on a high-performance reconfigurable computing (HPRC) system and our results demonstrate quantitative improvement over existing Field-Programmable-Gate-Array (FPGA)-based hardware emulators.

Vu Tuan Hai