Fast single qubit gates in a capacitively shunted fluxonium

Jaseung Ku, Yebin Liu, B. L. T. Plourde +5 more

Xuexin Xu, Mohammad H. Ansari, Jaseung Ku +5 more

Nathan Earnest, Srivatsan Chakram, Yao Lu +9 more

Peng Zhao, Peng Xu, Zheng-Yuan Xue

Fluxonium qubits have demonstrated high-fidelity operations and long coherence times in small-scale systems, highlighting their promise for quantum computing. However, large-scale integration into a high-performance two-dimensional (2D) qubit array remains the central challenge for practical applications. In this work, we introduce an extensible architecture for scaling up fluxonium qubits in 2D grids. To address the key challenges, namely achieving controllable strong interaction and high connectivity for qubits featuring small shunting capacitors (footprints), we propose using low-shunt-capacitance couplers to enable tunable interactions between fluxonium qubits. When embedded into 2D square lattices, large couplings can be achieved even with relatively small coupling capacitances, thus enabling multiple connections with sufficient capacitance budget. We further propose coupler realizations based on generalized flux qubit circuits, specifically the quarton and the fluxonium, and demonstrate that both enable fast, high-fidelity gates with low spectator errors, while supporting multiple connections on 2D grids.

Jaseung Ku, Matthew Hutchings, Yebin Liu +7 more

Quan Guan, Guo Xuan Chan, Xu Dou +2 more

Fluxonium qubits combine long coherence times with strong anharmonicity, making them attractive for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity two-qubit gates and multi-qubit entanglement in one-dimensional and connectivity-four fluxonium processors, motivating their extension to highly connected two-dimensional (2D) architectures. A central challenge in this extension is to achieve strong coupling to multiple circuit elements while preserving the finite capacitance budget of fluxonium qubits, which constrains the attainable qubit-qubit effective coupling strength and, consequently, two-qubit gate performance. Here, we establish a unified theoretical framework that identifies the connectivity-dependent upper bound on capacitive coupling and quantifies its reduction by distinct parasitic-capacitance channels, applicable across both fluxonium and transmon regimes. We show that pad-to-ground loading is primarily geometry limited and can be substantially suppressed through qubit-pad engineering, whereas inter-pad loading is ultimately constrained by parasitic capacitances of Josephson junctions and Josephson junction arrays. Building on these insights, we formulate practical design principles and numerically demonstrate two-qubit gates as fast as 27 ns and leakage-induced infidelity below $10^{-3}$ under representative fabrication variations in 2D fluxonium architectures. These results establish a quantitative framework for understanding and mitigating capacitive loading, suggesting that it does not impose a fundamental performance limit on highly connected fluxonium processors.