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Bulletin of the American Physical Society

Towards a fluxonium-based quantum processor II: interacting qubits

Long B. Nguyen, Aaron Somoroff, Yen‐Hsiang Lin, Raymond Mencia, Ivan Pechenezhskiy, Konstantin Nesterov, Maxim Vavilov, Vladimir Manucharyan

Published Mar 7, 2019• 0 citations
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A central challenge in fluxonium-based quantum processors is the extension of the qubit connectivity to two-dimensional lattices compatible with quantum code-error correction. Here, we present a fluxonium quantum processor that employs lumped-element resonator couplers which realizes, for the first time, a connectivity-four unit cell with suppressed parasitic interactions. We achieve parallel single-qubit gate fidelities exceeding 99.9 % in simultaneous randomized benchmarking experiments, while maintaining residual static ZZ interactions below 1 kHz across all coupled qubit pairs. We implement resonator-induced phase (RIP) gates and benchmark two-qubit gate fidelities exceeding 99 % using interleaved randomized benchmarking. To cancel spectator errors observed in two-qubit operations, we implement a refocused RIP gate, recovering coherent control in the presence of multi-qubit connectivity. Furthermore, we prepare Greenberger-Horne-Zeilinger states of up to five qubits with a tomographic fidelity of 90 %, verifying multi-qubit entanglement within the unit cell. These results establish the fluxonium-resonator-fluxonium architecture as a viable approach to realizing densely connected fluxonium processors and provide a scalable path toward quantum error-correction-compatible processor architectures.

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Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular, although tunable-coupler-mediated interactions have been validated for small fluxonium systems, it remains unclear whether such designs can be scaled to a multi-qubit lattice. Here, we establish a scalable fluxonium processor architecture based on a modular qubit-coupler unit cell engineered to suppress residual interactions and spectator errors in a many-qubit lattice. The system enables parallel single-qubit gate fidelities approaching 99.99% and two-qubit CZ gate fidelities around 99%. With an optimized gate duration of 32 ns, the best CZ gate fidelity reaches 99.9%. We further validate this architecture in a 22-qubit processor based on the same configuration, where parallel operations enable the deterministic generation of Greenberger-Horne-Zeilinger states involving up to 10 qubits. Together, these results demonstrate that the fluxonium-tunable-coupler unit cell composes without emergent interaction pathologies and establish fluxonium as a scalable superconducting qubit platform.

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Fluxonium qubits combine long coherence times with strong anharmonicity, making them a promising platform for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity operations in multi-qubit processors while suppressing stray qubit interactions using fluxonium-transmon-fluxonium (FTF) architectures. However, scaling such systems to larger arrays is constrained by a trade-off between achievable coupling strength, crosstalk suppression and qubit-qubit spacing required for wiring in a two-dimensional architecture. Multimode couplers, such as the double-transmon coupler (DTC), provide a promising pathway to overcome this limitation by enabling stronger interactions without compromising qubit spacing and isolation. Here, we develop a quantitative design framework for fluxonium-based quantum processors employing DTCs. Central to this work is a frequency-partitioned architecture that places qubit transitions, tunable-coupler excitations, and resonator modes in well-separated spectral regions. This structured allocation reduces parameter interdependence and enables the concurrent optimization of gate operations, readout, and qubit reset. By formulating device design as a multi-objective optimization problem under realistic experimental constraints and fabrication-induced disorder, we develop a tractable sequential workflow and determine a feasible parameter regime that simultaneously supports high-fidelity single- and two-qubit gates, fast qubit reset, and robust dispersive readout. These results establish a system-level architectural methodology that links circuit parameters to processor-level performance, and provide an experimentally actionable pathway toward scalable fluxonium quantum processors.

quant-pharXiv:2604.26373•Apr 30, 2026•0 citations
A central challenge in fluxonium-based quantum processors is the extension of the qubit connectivity to two-dimensional lattices compatible with quantum code-error correction. Here, we present a fluxonium quantum processor that employs lumped-element resonator couplers which realizes, for the first time, a connectivity-four unit cell with suppressed parasitic interactions. We achieve parallel single-qubit gate fidelities exceeding 99.9 % in simultaneous randomized benchmarking experiments, while maintaining residual static ZZ interactions below 1 kHz across all coupled qubit pairs. We implement resonator-induced phase (RIP) gates and benchmark two-qubit gate fidelities exceeding 99 % using interleaved randomized benchmarking. To cancel spectator errors observed in two-qubit operations, we implement a refocused RIP gate, recovering coherent control in the presence of multi-qubit connectivity. Furthermore, we prepare Greenberger-Horne-Zeilinger states of up to five qubits with a tomographic fidelity of 90 %, verifying multi-qubit entanglement within the unit cell. These results establish the fluxonium-resonator-fluxonium architecture as a viable approach to realizing densely connected fluxonium processors and provide a scalable path toward quantum error-correction-compatible processor architectures.
Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular, although tunable-coupler-mediated interactions have been validated for small fluxonium systems, it remains unclear whether such designs can be scaled to a multi-qubit lattice. Here, we establish a scalable fluxonium processor architecture based on a modular qubit-coupler unit cell engineered to suppress residual interactions and spectator errors in a many-qubit lattice. The system enables parallel single-qubit gate fidelities approaching 99.99% and two-qubit CZ gate fidelities around 99%. With an optimized gate duration of 32 ns, the best CZ gate fidelity reaches 99.9%. We further validate this architecture in a 22-qubit processor based on the same configuration, where parallel operations enable the deterministic generation of Greenberger-Horne-Zeilinger states involving up to 10 qubits. Together, these results demonstrate that the fluxonium-tunable-coupler unit cell composes without emergent interaction pathologies and establish fluxonium as a scalable superconducting qubit platform.
Fluxonium qubits combine long coherence times with strong anharmonicity, making them a promising platform for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity operations in multi-qubit processors while suppressing stray qubit interactions using fluxonium-transmon-fluxonium (FTF) architectures. However, scaling such systems to larger arrays is constrained by a trade-off between achievable coupling strength, crosstalk suppression and qubit-qubit spacing required for wiring in a two-dimensional architecture. Multimode couplers, such as the double-transmon coupler (DTC), provide a promising pathway to overcome this limitation by enabling stronger interactions without compromising qubit spacing and isolation. Here, we develop a quantitative design framework for fluxonium-based quantum processors employing DTCs. Central to this work is a frequency-partitioned architecture that places qubit transitions, tunable-coupler excitations, and resonator modes in well-separated spectral regions. This structured allocation reduces parameter interdependence and enables the concurrent optimization of gate operations, readout, and qubit reset. By formulating device design as a multi-objective optimization problem under realistic experimental constraints and fabrication-induced disorder, we develop a tractable sequential workflow and determine a feasible parameter regime that simultaneously supports high-fidelity single- and two-qubit gates, fast qubit reset, and robust dispersive readout. These results establish a system-level architectural methodology that links circuit parameters to processor-level performance, and provide an experimentally actionable pathway toward scalable fluxonium quantum processors.