Analysis of Reversible Logic Gates

Tanuja Pande, Narendra Kumar Shukla

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

Reversible logic is expanding grounds with its applicability to various upcoming technologies and quantum computation. Numerous reversible gates has also been proposed for designing logic circuits apart of basic quantum controlled Toffoli and Fredkin gates. A comparative study and analysis of a range of reversible gates from the literature is presented in this paper to obtain an optimal solution for designing these circuits. The gates are synthesized and implemented to obtain equivalent quantum circuits and operating cost in terms of number of inputs, gate cost, quantum cost, garbage output and ancilla input. The comparison is done at two subsequent levels i.e. gates structural level and circuit design level, providing a better solution for designing logic circuits. It is calculated that, basic gates are 50% efficient at gate level and 33% at design level analysis in terms of gate cost, as compared to the most efficient gates proposed in the literature.

Haibao Zhang, Zhijin Guan, Lu Cangang

Delay is an important parameter that needs to be considered in the reversible logic designs, but not much work on delay in reversible network has been done at present. This paper presents an algorithm to calculate delay of reversible network. In the process of calculating delay, we not only take the complexity of different logic gates into consideration, but also the relationship between the output delay of the target bits and all inputs delay of the controlled reversible logic gates is considered. We use the algorithm to calculate the delay in reversible logic circuits synthesized and optimized by several different reversible logic synthesis methods. Then we analyze the performance of these reversible logic synthesis methods in delay level. Through the comparative analysis, we prove that these reversible logic synthesis methods for some function in reducing quantum cost have a good effect, but not in delay level. The quantum cost of some reversible logic circuits which have the same function is less, however the delay may not.

Dilip P. Vasudevan, Parag K. Lala

A. Kamaraj, P. Marichamy, S. Karthika Devi +1 more

Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day’s energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one Keywords: Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality.