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Alexandria Engineering Journal

High performance short-block binary regular LDPC codes

Latifa Mostari, Abdelmalik Taleb Ahmed

Published Nov 15, 2018• 17 citations
Publisher

Abstract

LDPC code shows a good performance with long-block codes. However, certain channels are constrained to use short-block codes due to latency. Therefore, concatenated LDPC codes with iterative decoding is a good choice to get a good performance. Concatenated binary LDPC codes were introduced as a class of concatenated codes in which the LDPC codes are irregular codes having different parameters. Although irregular LDPC codes are more efficient than regular codes, irregular LDPC codes have an error floor and a higher encoding complexity than regular code. In this paper, in order to get a good performance/complexity trade-off with a short-block code, we investigate a parallel concatenation of two identical regular binary LDPC codes, using an interleaver. Simulation results show that the proposed code outperforms a single LDPC code. The proposed code needs less time decoding delay than a single LDPC code with the same iteration number. Also, the proposed code needs a less number of iterations to achieve the same performance of a single LDPC code that leads to less decoding complexity and decoding delay. A simplified algorithm, the min-sum algorithm, that is used to decode the component codes shows a small performance loss with respect to the sum-product algorithm.

DOI
10.1016/j.aej.2017.09.016

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LDPC code shows a good performance with long-block codes. However, certain channels are constrained to use short-block codes due to latency. Therefore, concatenated LDPC codes with iterative decoding is a good choice to get a good performance. Concatenated binary LDPC codes were introduced as a class of concatenated codes in which the LDPC codes are irregular codes having different parameters. Although irregular LDPC codes are more efficient than regular codes, irregular LDPC codes have an error floor and a higher encoding complexity than regular code. In this paper, in order to get a good performance/complexity trade-off with a short-block code, we investigate a parallel concatenation of two identical regular binary LDPC codes, using an interleaver. Simulation results show that the proposed code outperforms a single LDPC code. The proposed code needs less time decoding delay than a single LDPC code with the same iteration number. Also, the proposed code needs a less number of iterations to achieve the same performance of a single LDPC code that leads to less decoding complexity and decoding delay. A simplified algorithm, the min-sum algorithm, that is used to decode the component codes shows a small performance loss with respect to the sum-product algorithm.
In this paper, a binary serial turbo LDPC code is presented. It represents a serial concatenated LDPC codes separated by interleavers, with iterative decoding. In this work, we aim to investigate the performance evaluation of concatenated code, with reduced complexity and decoding delay, associated with high order constellation using Gray mapping, over Gaussian and Rayleigh channels. Simulation results show that the performance of a serial concatenated LDPC codes is higher than that of single LDPC code with the same code rate and code block length.
In this paper, we construct regular and irregular LDPC codes using (n, {k1,k2}, 1)block design. The problem of designing regular and irregular structured LDPC codes that have good overall error performance for wide range of code rates and block sizes with attractive storage requirements is attempted. The codes constructed by this method have the girth at least 6 and they perform well with the sum-product iterative decoding algorithm. Further we analyze the constructed codes based on number of short cycles of the corresponding Tanner graph. The analysis shows that codes having small number of short cycles and a cycle structure which is not overly regular in their Tanner graph perform better. The presented codes are well structured and unlike random codes can lend themselves to a very low-complexity encoder and decoder implementation.
This paper analyzes the performance of quantized min-sum decoding algorithms for irregular low-density parity-check (LDPC) codes. For regular LDPC codes, it is known that the normalized or offset min-sum decoding algorithm with quantization bits less than 6 bits achieves good performances over wide range of signal-to-noise ratios (SNR). However, finite precision effects in decoding irregular LDPC codes are different from that in decoding regular LDPC codes which is caused by the difference of convergence speeds between low degree nodes and high degree nodes. This paper proposes a novel method to improve the performance of the conventional normalized or offset min-sum decoding algorithm when it is approximated with finite precision for hardware implementations. The proposed method applies down-scaling factors to intrinsic information which has effects on increasing the reliability of extrinsic information at variable nodes and compensating the quantization errors caused by finite precision. Computer simulation results for irregular LDPC codes show that the proposed normalized and offset min-sum decoding algorithms achieve better performances at high SNR compared to the conventional normalized and offset min-sum algorithms under (6:2) quantization scheme.
The optimal performance-complexity tradeoff for error-correcting codes at rates strictly below the Shannon limit is a central question in coding theory. This paper proposes a numerical approach for the minimization of decoding complexity for long-block-length irregular low-density parity-check (LDPC) codes. The proposed design methodology is applicable to any binary-input memoryless symmetric channel and any iterative message-passing decoding algorithm with a parallel-update schedule. A key feature of the proposed optimization method is a new complexity measure that incorporates both the number of operations required to carry out a single decoding iteration and the number of iterations required for convergence. This paper shows that the proposed complexity measure can be accurately estimated from a density-evolution and extrinsic-information transfer chart analysis of the code. A sufficient condition is presented for convexity of the complexity measure in the variable edge-degree distribution; when it is not satisfied, numerical experiments nevertheless suggest that the local minimum is unique. The results presented herein show that when the decoding complexity is constrained, the complexity-optimized codes significantly outperform threshold-optimized codes at long block lengths, within the ensemble of irregular codes.
In this paper, both the high-complexity near-ML list decoding and the low-complexity belief propagation decoding are tested for some well-known regular and irregular LDPC codes. The complexity and performance trade-off is shown clearly and demonstrated with the paradigm of hybrid decoding. For regular LDPC code, the SNR-threshold performance and error-floor performance could be improved to the optimal level of ML decoding if the decoding complexity is progressively increased, usually corresponding to the near-ML decoding with progressively increased size of list. For irregular LDPC code, the SNR-threshold performance and error-floor performance could only be improved to a bottle-neck even with unlimited decoding complexity. However, with the technique of CRC-aided hybrid decoding, the ML performance could be greatly improved and approached with reasonable complexity thanks to the improved code-weight distribution from the concatenation of CRC and irregular LDPC code. Finally, CRC-aided 5GNR-LDPC code is evaluated and the capacity-approaching capability is shown.
Recently, LDPC codes have been proved to be capable of closely approaching the channel capacity and hence they are strongly promoted in many international standards. Though decoding is simpler compared to Turbo code decoding, efficient decoding techniques for LDPC codes are in demand to make it further simpler. The theoretical performance of LDPC codes appears simple and close to Shannon’s capacity of channel, but the practical implementation is still challenging due to tasks like numerical inaccuracy, limited memory resources, etc. We investigate methods to reduce the complexity and make decoding simple while still keeping the loss in performance negligible. The aim of this paper is to reduce the complexity by simplification of the component decoders. For this, we analyze the min-sum algorithm and derive a theoretical framework. With this framework, we are able to modify the algorithm in order to achieve good performance for regular as well as irregular LDPC codes.