Building quantum computers requires not only a large number of qubits with high fidelity and low variability, but also a large amount of analog and digital components to drive the qubits. Larger arrays of solid-state qubits with high fidelity and low variability require improvements in fabrication processes and array layout design co-optimized with the underlying hardware technology. Here we outline progress on 300mm fabrication of qubit devices and on classical CMOS components to enable the quantum system. We describe work on superconducting qubits and spin qubits in Si, both types of devices fabricated on 300mm experimental platforms and discuss challenges related to variability. Massive electrical characterization is key over wide temperature range is key to enabling system upscaling for QC.
Large quantum computations require high-fidelity error-corrected memory and fault-tolerant logical operations. To achieve these with superconducting circuits, quantum processors will need many components operating with low error rates. In practice, fabrication of monolithic superconducting devices produces unavoidable heterogeneity in component performance, which the quantum computer must accommodate. We implement strategies to operate a large dynamic compass code on an array of 156 superconducting qubits arranged on a heavy-hexagonal lattice, making use of the entire monolithic quantum processor and redesigning our measurement schedule to exclude underperforming components. We demonstrate improvements of up to
35% in logical error probabilities for a memory experiment by using a noise-informed decoder combined with strategies to exclude the worst-performing qubits and couplers, along with post-selecting on shots with a low probability of leakage errors. In addition to these memory results, we also observe performance gains of up to
56% when these strategies are applied to measurement-based logic, demonstrated by stability experiments. We furthermore demonstrate high-fidelity fault-tolerant logic through lattice surgery. Through pre-selection filtering techniques, we can obtain Bell fidelities above
77%, and further logical gap post-selection using exclusive decoding increases these fidelities to above
97%. Our experiments demonstrate that high performance can be maintained in key elements of fault-tolerant quantum memory and logic when working on monolithic superconducting quantum processors with underperforming components, by using a suite of noise-informed quantum error correction strategies.
實現可集成的量子計算的關鍵步驟是實現保真度足夠高的一組普適量子邏輯門 .最近幾年發展的幾何量子計算使用幾何位相來實現量子邏輯門 ,其特點是利用幾何位相的整體幾何性質來避免某些局域的無規噪聲的影響 ,從而實現較高保真度的量子門 .文章先簡要介紹常規幾何量子邏輯門的概念 ,然后重點介紹最近提出的非常規幾何量子計算 :量子計算中使用的邏輯門的總位相既包含有幾何位相 ,又包含有動力學位相 ,但它僅依賴于一些幾何特征 .而且 ,對于任意的量子位輸入態 ,在量子門操作過程中積累的位相要么是零 ,要么是僅依賴幾何特征的位相 . \nThe physical implementation of a universal set of high-fidelity quantum gates is a key step in quantum computation. Geometric quantum computation is a promising scenario to achieve high-fidelity quantum gates. In this scheme, quantum gates are realized based on geometric phases, which are dependent only on some global geometric features. In this Communication, we present an overview of geometric quantum computation, especially the unconventional geometric quantum computation recently proposed by us. In the latter scheme, the total phase accumulated in a gate operation consists of both geometric and dynamic components, but for any input state it still only depends on the global geometric features.