Minimum Cost Mapping of Quantum Circuits to Quantum Computers

Anirban Basak, Arindam Sadhu, Kunal Das +1 more

Jaime Alvarado‐Valiente, Javier Romero‐Álvarez, Jorge Casco-Seco +2 more

Currently, quantum processors offered by quantum service providers are significantly underutilized, resulting in high execution costs and limited scalability. Various approaches have explored parallelization and circuit scheduling techniques to improve resource utilization. While these methods can significantly reduce both cost and execution times, they often have an impact on the results' noise. Addressing this challenge, this emerging study proposes a technique called Quantum Island Mapping, which enables the execution of multiple quantum circuits by separating them into “islands” within the qubit topology of a processor. The goal is to schedule multiple circuits into a single task to reduce execution costs and queuing, while maintaining a controlled separation of qubits between circuits to minimize interferences. To achieve this, separation distance parameters are defined, specifying the minimum number of qubits between different islands. This allows for configurations ranging from zero separation (maximum processor utilization) to maximum separation (single-circuit execution). The technique has been validated through experiments on a real quantum computer using well-known quantum algorithms, achieving optimal results.

Zahra Sasanian

Quantum information processing is of interest as it offers the potential for a new generation of very powerful computers supporting novel computational paradigms. Over the last couple of decades, different aspects of quantum computers ranging from quantum algorithms to quantum physical design have received growing attention. One of the most important research areas is the synthesis and post-synthesis optimization of reversible and quantum circuits. Many synthesis and optimization approaches can be found in the literature, yet, due to the complexity of the problem, finding approaches leading to optimal, or near optimal, results is still an open problem. The synthesized circuits are usually evaluated based on quantum cost models. Therefore, they are often technology mapped to circuits of more primitive gates. To this end, various technology mapping approaches have also been proposed in the past few years. Related work shows an existing gap in optimized technology mapping for reversible and quantum circuits. In this dissertation, an optimized technology mapping design flow is introduced for mapping reversible circuits to quantum circuits. The contributions of this dissertation are classified as follows: - New reversible circuit optimization methods. - Optimized reversible to quantum mapping approaches. - New quantum gate libraries and new cost models for reversible gates based on the new libraries. - Quantum circuit optimization approaches. The steps above, form an optimized flow for mapping reversible circuits to quantum circuits. At each step of the design flow optimized and consistent approaches are suggested with the goal of reducing the quantum cost of the synthesized reversible circuits. The evaluations show that the proposed mapping methodology leads to significant improvement in the quantum cost of the existing benchmark circuits.

Lukas Burgholzer, Robert Wille

賢太 海老澤, 1477, Kenta Ebisawa

Anindita Banerjee, Anirban Patha

A new algorithm for minimization of quantum cost of quantum circuits has been designed. The quantum cost of different quantum circuits of particular interest (eg. circuits for EPR, quantum teleportation, shor code and different quantum arithmetic operations) are computed by using the proposed algorithm. The quantum costs obtained using the proposed algorithm is compared with the existing results and it is found that the algorithm has produced minimum quantum cost in all cases.