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Journal of Information Processing

Logical Qubit Layout Problem for ICM Representation

Nurul Ain Binti Adnan, Shigeru Yamashita

Published Jan 1, 2018• 3 citations
Publisher

Abstract

This paper formulates the qubit layout problem for ICM representation which is favorable for topological quantum computation. Observing the properties of braiding operations in a logic circuit model of ICM, we study the potential usefulness of two-dimensional qubit layouts based on this model. We compare and contrast the efficiency of one- and two-dimensional qubit layouts in reducing the logical time steps for topological quantum circuits. This leads us to an approach to find a good gate order for two-dimensional qubit layouts. Indeed, our preliminary experimental results show the effectiveness of two-dimensional qubit layouts.

DOI
10.2197/ipsjjip.26.20

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This paper formulates the qubit layout problem for ICM representation which is favorable for topological quantum computation. Observing the properties of braiding operations in a logic circuit model of ICM, we study the potential usefulness of two-dimensional qubit layouts based on this model. We compare and contrast the efficiency of one- and two-dimensional qubit layouts in reducing the logical time steps for topological quantum circuits. This leads us to an approach to find a good gate order for two-dimensional qubit layouts. Indeed, our preliminary experimental results show the effectiveness of two-dimensional qubit layouts.
The goal of this thesis is to examine some of the ways in which we might optimise the design of topological qubits. The topological operations which are imposed on qubits, in order to perform logic gates for topological quantum computations, are governed by the exchange group of the constituent particles. We examine representations of these exchange groups and investigate what restrictions their structure places on the effciency, reliability and universality of qubits (and multi-qubit systems) as a function of the number of particles composing them. Specific results are given for the limits placed on d-dimensional qudits where logic gates are imposed by braiding anyons in 2+1 dimensions. We also study qudits designed from ring-shaped, anyon-like excitations in 3+1 dimensions, where logic gates are implemented by elements of the loop braid group. We introduce the concept of local representations, where the generators of the loop braid group are defined to act non-trivially only on the local vector spaces associated with the rings which undergo the motion. We present a method for obtaining local representations of qudits and show how any such representation can be decomposed into representations which come from the quantum doubles of groups. Due to the dimension of the local representation being related to the number of generators, any non-Abelian properties of the representation are not compromised with an addition of extra operations, we conclude that universal representations may be easier to find than in previously discussed cases (though not for topological operations alone). We model a ring of Ising anyons in a fractional quantum Hall uid to study how interactions in a real environment may impact any qubits we have created. Fractional quantum Hall liquids are currently one of the most promising possibilities for the physical realisation of TQC and so present a natural choice of system in which to study these effects. We show how interactions between the anyons compromise the practicality of qubits defined by the fusion channels of anyon pairs and explore the use of the fermion number parity sectors as qubit states. Interactions between the anyon ring and the edge of the liquid are modelled to study the effect they will have on the state of the qubit. We perform numerical simulations, for a small system, to give some indication of how the edge interaction will in uence the reliability of the qubit.
In Layout Synthesis, the logical qubits of a quantum circuit are mapped to the physical qubits of a given quantum hardware platform, taking into account the connectivity of physical qubits. This involves inserting SWAP gates before an operation is applied on distant qubits. Optimal Layout Synthesis is crucial for practical Quantum Computing on current error-prone hardware: Minimizing the number of SWAP gates directly mitigates the error rates when running quantum circuits. In recent years, several approaches have been proposed for minimizing the required SWAP insertions. The proposed exact approaches can only scale to a small number of qubits. In this paper, we provide two encodings for Optimal Layout Synthesis as a classical planning problem. We use optimal classical planners to synthesize the optimal layout for a standard set of benchmarks. Our results show the scalability of our approach compared to previous leading approaches. We can optimally map circuits with 9 qubits onto a 14 qubit platform, which could not be handled before by exact methods.
We examine how best to design qubits for use in topological quantum computation. These qubits are topological Hilbert spaces associated with small groups of anyons. Operations are performed on these by exchanging the anyons. One might argue that in order to have as many simple single-qubit operations as possible, the number of anyons per group should be maximized. However, we show that there is a maximal number of particles per qubit, namely 4, and more generally a maximal number of particles for qudits of dimension d . We also look at the possibility of having topological qubits for which one can perform two-qubit gates without leakage into non-computational states. It turns out that the requirement that all two-qubit gates are leakage free is very restrictive and this property can only be realized for two-qubit systems related to Ising-like anyon models, which do not allow for universal quantum computation by braiding. Our results follow directly from the representation theory of braid groups, which implies that they are valid for all anyon models. We also make some remarks about generalizations to other exchange groups.
In Layout Synthesis, the logical qubits of a quantum circuit are mapped to the physical qubits of a given quantum hardware platform, taking into account the connectivity of physical qubits. This involves inserting SWAP gates before an operation is applied on distant qubits. Optimal Layout Synthesis is crucial for practical Quantum Computing on current error-prone hardware: Minimizing the number of SWAP gates directly mitigates the error rates when running quantum circuits. In recent years, several approaches have been proposed for minimizing the required SWAP insertions. The proposed exact approaches can only scale to a small number of qubits. Proving that a number of swap insertions is optimal is much harder than producing near optimal mappings. In this paper, we provide two encodings for Optimal Layout Synthesis as a classical planning problem. We use optimal classical planners to synthesize the optimal layout for a standard set of benchmarks. Our results show the scalability of our approach compared to previous leading approaches. We can optimally map circuits with 9 qubits onto a 14 qubit platform, which could not be handled before by exact methods.
One of the key compilation steps in Quantum Computing (QC) is to determine an initial logical to physical mapping of the qubits used in a quantum circuit. The impact of the starting qubit layout can vastly affect later scheduling and placement decisions of QASM operations, yielding higher values on critical performance metrics (gate count and circuit depth) as a result of a quantum compilers introducing communication operations to meet the underlying physical neighboring and connectivity constraints of the quantum device.We present our ongoing work on qubit mapping with affine abstractions, which aims to compute effective initial qubit layouts. The key assumption is that the quantum program is represented in an affine representation, a property which permits us to apply aggressive program analyses to determine the potential of sharing qubit accesses among groups of quantum operations prescribed by linear and affine relations. We present preliminary results demonstrating the effectiveness of our novel approach on 69 quantum circuits, while using the QISKIT compiler on IBM Tokyo and Google Sycamore, obtaining between 16% and 21% average improvement on circuit depth and 24%–47% improvement on the number of added gates.