Hierarchical synthesis of quantum and reversible architectures
Archimedes Pavlidis, Dimitris Gizopoulos
Reversible hardware finds application in emerging areas such as low power circuit design, quantum computing, optical computing, and DNA computing. Intensive research has recently focused on the synthesis of reversible architectures. Most of these approaches derive efficient or even optimal circuits having as major drawback the scalability: they can only handle small circuits (up to a few hundred inputs for the most promising ones). In this paper, we propose a graph-based hierarchical synthesis method for large reversible and quantum architectures which can be combined with any of the existing synthesis methods to deliver unlimited scalability for arbitrary large and/or irregular architectures. The specification of any complex function is provided in the form of a sequential algorithm consisting of primitive pre-synthesized operations available in a library. The components of the library may have been designed by ad-hoc methods or synthesized by the known methods in the literature or even by the proposed synthesis procedure. The synthesized architecture is represented as a dependence graph whose nodes correspond to the available components of the library and their respective inverses so as to reset possible intermediate ancillae bits used during the synthesis procedure back to their initial state. The method can be recursively applied at multiple levels to build any complex reversible or quantum architecture.
ACM International Conference on Computing Frontiers (CF)•May 6, 2015•0 citations