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IEEE Communications Letters

A Parity Structure for Scalable QC-LDPC Codes With All Nodes of Degree Three

Xiaoning Wu, Ming Jiang, Chunming Zhao

Published Jun 5, 2017• 4 citations
Publisher

Abstract

A novel block triple-diagonal (BTD) parity structure with all nodes of degree three is proposed for quasi-cyclic (QC) low-density parity-check (LDPC) codes. The BTD structure without low node degree can effectively improve the error floor performance and, meanwhile, enable low complexity encoding. With this structure, we use a modulo-lifting technology to construct a family of QC-LDPC codes, which supports scalable code lengths with a simple and flexible encoding solution. The simulation results show that our coding schemes for short and moderate lengths achieve better performance in the error floor region.

DOI
10.1109/lcomm.2017.2712187

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A novel block triple-diagonal (BTD) parity structure with all nodes of degree three is proposed for quasi-cyclic (QC) low-density parity-check (LDPC) codes. The BTD structure without low node degree can effectively improve the error floor performance and, meanwhile, enable low complexity encoding. With this structure, we use a modulo-lifting technology to construct a family of QC-LDPC codes, which supports scalable code lengths with a simple and flexible encoding solution. The simulation results show that our coding schemes for short and moderate lengths achieve better performance in the error floor region.
The block dual-diagonal (BDD) parity structure is widely adopted in many practical irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes. These QC LDPC codes have good error-correcting performance in waterfall region but usually show relatively high error floors in low error rate region. In this paper, by using multi-weight circulants, a new BDD structure is proposed for the parity part of irregular QC LDPC codes to lower error floors and support efficient encoding. Since the parity part of parity-check matrices has flexible degree distribution with the aid of multi-weight circulants, QC LDPC codes with the proposed BDD structure can have large minimum Hamming distance compared to those with the conventional BDD structure, especially, in the low-rate case. Simulation results show that QC LDPC codes with the proposed BDD structure have lower error floor than those with the conventional BDD structure.
Irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes with the block dual-diagonal (BDD) parity structure are widely adopted in many communication standards because the BDD structure supports an efficient encoding and many degree-2 variable nodes inside are adequate for the construction of mid- to high-rate codes. However, we observe that low-rate irregular QC LDPC codes with the BDD parity structure inherently contain too many degree-2 variable nodes and suffer from error floors in high signal-to-noise ratio (SNR) region. In this paper, a generalized BDD structure including double-weight circulants as well as circulant permutation matrices is proposed for low-rate irregular QC LDPC codes with low error floors which is achieved with a little bit giving up error performance in the waterfall region. When constructing the parity part of a code with the generalized BDD structure, the portion of double-weight circulants is variable so that the resulting LDPC code can achieve a desired degree distribution including degrees 2 and 3 while supporting the efficient encoding. We show that low-rate QC LDPC codes constructed with the proposed BDD structure have better theoretical properties and lower error floor than those with the conventional BDD structure.
In this paper, we propose a simple mathematical structure to improve the BER (bit error rate) performance of quasi-cyclic low-density parity-check (QC-LDPC) codes. Since the proposed structure can be defined in-between those of random codes and structured codes, these proposed QC-LDPC codes not only perform as well as random-LDPC codes, but also preserve the advantage of structured LDPC codes which is easier to implement over coding hardware. Moreover, the proposed structure, constructed from balanced incomplete block design (BIBD), can reduce the density of parity-check matrix and hence reduce the number of short cycles, which generally lead to better performance. At the end, we show that the error floor performance of QC-LDPC codes can be improved by proposed hybrid structures and perform well over binary-input additive white Gaussian noise (BI-AWGN) channel.
In this paper, a novel methodology for designing structured generalized low-density parity-check (G-LDPC) codes is presented. The proposed design results in quasi-cyclic G-LDPC codes for which efficient encoding is feasible through shift-register-based circuits. The structure imposed on the bipartite graphs, together with the choice of simple component codes, leads to a class of codes suitable for fast iterative decoding. A pragmatic approach to the construction of G-LDPC codes is proposed. The approach is based on the substitution of check nodes in the protograph of a low-density parity-check code with stronger nodes based, for instance, on Hamming codes. Such a design approach, which we call low-density parity-check (LDPC) code doping, leads to low-rate quasi-cyclic G-LDPC codes with excellent performance in both the error floor and waterfall regions on the additive white Gaussian noise channel.
Based on the structure of parity-check matrix of RU algorithm,a class of Quasi-cycle Low-density Parity-check(QC-LDPC) codes with complexity is constructed by selecting sub-matrices reasonably to restrict and consisting of lower dual diagonal matrices.Simulation results show that not only the proposed codes have lower complexity,but also the error-correcting performance is better than QC-LDPC codes randomly constructed and practical Block-LDPC codes in the additive white Gaussion noise channel.It can get 0.3 dB Signal to Noise Ratio(SNR) gain at a Bit Error Rate(BRE) of 10-6.