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ACM Journal on Emerging Technologies in Computing Systems

Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability

Arighna Deb, Debesh Kumar Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya

Published Jun 27, 2016• 4 citations
Publisher

Abstract

In this article, we introduce a novel method of synthesizing symmetric Boolean functions with reversible logic gates. In contrast to earlier approaches, the proposed technique deploys a simple, regular, and cascaded structure consisting of an array of Peres and CNOT gates, which results in significant reduction with respect to the quantum cost. However, the number of circuit inputs may increase slightly when such cascades are used. In order to reduce their number, we next propose a postsynthesis optimization phase that allows judicious reuse of circuit lines. In addition to offering a cost-effective synthesis methodology, the proposed reversible logic structure supports elegant testability properties. With respect to all single or partial missing gate faults (SMGFs and PMGFs), or repeated gate faults (RGFs) in such an n -input circuit module, we show that it admits a universal test set of constant cardinality (=3) for any value of n . Thus, considering both the cost and testability issues, this approach provides a superior option for synthesizing symmetric functions compared to existing designs.

DOI
10.1145/2894757

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In this paper, we propose a method to realize symmetric binary functions as quaternary quantum/reversible circuits. In contrast to the existing binary synthesis methods, our design in quaternary domain offers a simple and regular cascade structure composed of quaternary quantum modules which enables significant reductions with respect to number of lines, levels and quantum costs. Further, a method to obtain an optimal realization is presented, this uses a few special quaternary quantum modules of low quantum cost. Experimental results confirm that our new method leads to realizations in quaternary domain with a significant reduction in number of lines, levels and quantum cost compared to the existing approaches in binary domain. Hence, our design in quaternary logic offers a useful alternative to existing designs in binary logic for realizing symmetric functions.
Reversible logic is of increasing importance to many future computer technologies. We introduce a regular structure to realize symmetric functions in binary reversible logic. This structure, called a 2*2 net structure, allows for a more efficient realization of symmetric functions than the methods introduced by the other authors. Our synthesis method allows us to realize arbitrary symmetric function in a completely regular structure of reversible gates with relatively little "garbage". Because every Boolean function can be made symmetric by repeating input variables, our method is applicable to arbitrary multi-input multi-output Boolean functions and realizes such arbitrary function in a circuit with a relatively small number of additional gate outputs. The method can also be used in classical logic. Its advantages in terms of numbers of gates and inputs/outputs are especially seen for symmetric or incompletely specified functions with many outputs.
We introduce a Reversible Programmable Gate Array (RPGA) based on regular structure to realize binary functions in reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. In addition, it realizes many non-symmetric functions even without variable repetition. Our synthesis method to RPGAs allows to realize arbitrary symmetric function in a completely regular structure of reversible gates with smaller “garbage” than the previously presented papers. Because every Boolean function is symmetrizable by repeating input variables, our method is applicable to arbitrary multi-input, multi-output Boolean functions and realizes such arbitrary function in a circuit with a relatively small number of garbage gate outputs. The method can be also used in classical logic. Its advantages in terms of numbers of gates and inputs/outputs are especially seen for symmetric or incompletely specified functions with many outputs.
In this paper, a new synthesis method for Boolean irreversible functions has been proposed which is based on rotation quantum operators. The primary motivation is that the implementation of these operators is commonly available in quantum technologies. We introduce an approach for synthesizing Boolean irreversible functions in quantum logic which is based on quantum rotation and CNOT operators and uses a prespecified fixed design where by changing the rotation angles a new functionality can be achieved. So this design can be viewed as a programmable array of rotation gates. If reduction in quantum cost is desired, after this step the optimization approach may be applied to reduce the number of gates by using some rules, which leads to a reduction of up to 48% in the quantum cost after optimization compared to the original nonoptimized design obtained from the synthesis method. The paper also introduces efficient designs with rotation operators for some important gates in the quantum circuit libraries. Our main contribution is introducing a novel and low complexity approach for synthesizing irreversible functions using elementary rotation operators with a regular fixed design. Also having as many functions as desired with the same inputs, the execution time just increases by one for each additional function and the circuit width is increased by one for each additional function. It is proved that our approach can always be applied to each Boolean function. We show the correctness of our approach and make an upper bound of the quantum cost of the circuit.
This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiple-valued domain. The authors present an optimal synthesis method to minimize quantum cost and some speedup methods with nonoptimal quantum cost. The methods here are applicable to small reversible functions. Unlike previous works that use permutative reversible gates, a lower level library that includes nonpermutative quantum gates is used here. The proposed approach obtains the minimum cost quantum circuits for Miller gate, half adder, and full adder, which are better than previous results. This cost is minimum for any circuit using the set of quantum gates in this paper, where the control qubit of 2-qubit gates is always basis binary. In addition, the minimum quantum cost in the same manner for Fredkin, Peres, and Toffoli gates is proven. The method can also find the best conversion from an irreversible function to a reversible circuit as a byproduct of the generality of its formulation, thus synthesizing in principle arbitrary multi-output Boolean functions with quantum gate library. This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis.