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International Conference on Intelligent Informatics and Biomedical Sciences (ICIIBMS)

Study on design of quantum fourier transform gate emulator

Norihito Higa, Mitsunaga Kinjo

Published Nov 1, 2015• 0 citations
Publisher

Abstract

In this study, we design small-scale circuit as quantum Fourier transform gate emulator which is a part of prime factorization quantum algorithm (Shor's algorithm), based on previous proposed quantum logic gate emulator with complex probability amplitude.
DOI
10.1109/iciibms.2015.7439492

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In 1994, Peter Shor presented an algorithm for integer factorization that used exponentiallyless operations than the most efficient known algorithm. His algorithm requiresthe use of a quantum computer, a theoretical computational device using quantum mechanicaleffects not utilized in contemporary computers. In this paper we have analysedthe mathematics behind Shor’s algorithm and the quantum circuits on which it operates.We have also studied the Quantum Fourier Transform, a central component of Shor’sAlgorithm. Furthermore we have written a program in C++ to simulate a quantum circuitperforming Shor’s algorithm and the quantum Fourier transform. We were able tounderstand the critical parts of Shor’s algorithm that contribute with the great increasein efficiency compared to classical algorithms.
In this paper,based on the quantum Fourier transform,we give a new quantum algorithm for prime factorization.The algorithm turns r to be phase factor under repeated application of Fourier transform and variate transform,where r is the order of a selective element in the ring of integers modulo N.Furthermore the amplitude of the non-target states except zero state is modified to be 0.Our algorithm′s success probability,which is more than 3/4 and higher than Shor′s algorithm,doesn′t depend on the size of r other than Shor′s algorithm.Meanwhile,we present a comparison of the required resource between the new algorithm and Shor′s algorithm.